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A bank PMIC EIC contains 16 EICs, and the operating registers are BIT0-BIT15, such as BIT0 of the register operated by EIC0. Using the one-dimensional array reg[CACHE_NR_REGS] for maintenance will cause the configuration of other EICs to be affected when operating a certain EIC. In order to solve this problem, configure the bit corresponding to the EIC through offset. Signed-off-by: Wenhua Lin <Wenhua.Lin@unisoc.com> Reviewed-by: Chunyan Zhang <zhang.lyra@gmail.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
388 lines
10 KiB
388 lines
10 KiB