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linux/drivers/clk/rockchip
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Heiko Stuebner 6f84ec0a5a clk: rockchip: rk3036: mark ddrphy as critical 
[ Upstream commit 596a977b34 ]

The ddrphy is supplied by the dpll, but due to the limited number of PLLs
on the rk3036, the dpll also is used for other periperhals, like the GPU.

So it happened, when the Lima driver turned off the gpu clock, this in
turn also disabled the dpll and thus the ram.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250503202532.992033-4-heiko@sntech.de
Signed-off-by: Sasha Levin <sashal@kernel.org>
History 2025-06-27 11:11:32 +01:00
..
clk-cpu.c clk: rockchip: Switch to use kmemdup_array() 2024-06-23 22:10:48 +02:00
clk-ddr.c clk: rockchip: Export rockchip_clk_register_ddrclk() 2020-09-22 15:16:37 +02:00
clk-half-divider.c clk: rockchip: Demote non-conformant kernel-doc header in half-divider 2021-01-26 00:24:05 +01:00
clk-inverter.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
clk-mmc-phase.c clk: rockchip: Remove an unused field in struct rockchip_mmc_clock 2024-05-04 12:38:02 +02:00
clk-muxgrf.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 2019-06-05 17:36:37 +02:00
clk-pll.c clk: rockchip: Add new pll type pll_rk3588_ddr 2024-08-29 11:13:28 +02:00
clk-px30.c clk: rockchip: px30: Drop CLK_NR_CLKS CLKPMU_NR_CLKS usage 2024-08-28 21:25:49 +02:00
clk-rk3036.c clk: rockchip: rk3036: mark ddrphy as critical 2025-06-27 11:11:32 +01:00
clk-rk3128.c clk: rockchip: rk3128: Add HCLK_SFC 2024-06-23 22:10:43 +02:00
clk-rk3188.c clk: rockchip: rk3188: Drop CLK_NR_CLKS usage 2024-06-27 21:04:40 +02:00
clk-rk3228.c clk: rockchip: rk3228: Drop CLK_NR_CLKS usage 2024-08-28 21:25:49 +02:00
clk-rk3288.c clk: rockchip: rk3288: Drop CLK_NR_CLKS usage 2024-08-28 21:25:49 +02:00
clk-rk3308.c clk: rockchip: rk3308: Drop CLK_NR_CLKS usage 2024-08-28 21:25:50 +02:00
clk-rk3328.c clk: rockchip: rk3328: fix wrong clk_ref_usb3otg parent 2025-04-10 14:39:19 +02:00
clk-rk3368.c clk: rockchip: rk3368: Drop CLK_NR_CLKS usage 2024-08-28 21:25:50 +02:00
clk-rk3399.c clk: rockchip: rk3399: Drop CLK_NR_CLKS CLKPMU_NR_CLKS usage 2024-08-28 21:25:50 +02:00
clk-rk3568.c clk: rockchip: rk3568: Add PLL rate for 724 MHz 2024-05-04 12:38:13 +02:00
clk-rk3576.c clk: rockchip: remove unused mclk_pdm0_p/pdm0_p definitions 2024-09-09 14:10:32 -07:00
clk-rk3588.c clk: rockchip: rk3588: drop unused code 2024-08-30 16:59:24 +02:00
clk-rv1108.c clk: rockchip: support more core div setting 2021-03-21 11:10:58 +01:00
clk-rv1126.c Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and 'clk-rockchip' into clk-next 2023-08-30 14:38:19 -07:00
clk.c clk: rockchip: fix finding of maximum clock ID 2024-10-09 16:06:51 -07:00
clk.h clk: rockchip: Add clock controller for the RK3576 2024-08-29 11:13:33 +02:00
Kconfig clk: rockchip: Add clock controller for the RK3576 2024-08-29 11:13:33 +02:00
Makefile clk: rockchip: Add clock controller for the RK3576 2024-08-29 11:13:33 +02:00
rst-rk3576.c clk: rockchip: Add clock controller for the RK3576 2024-08-29 11:13:33 +02:00
rst-rk3588.c clk: rockchip: rk3588: Add reset line for HDMI Receiver 2024-04-10 07:10:40 +02:00
softrst.c clk: rockchip: add lookup table support 2022-11-14 15:35:07 +01:00