linux/drivers/cxl
Yuxiong Wang 130381dd82 cxl: Fix premature commit_end increment on decoder commit failure
[ Upstream commit 7b6f9d9b1e ]

In cxl_decoder_commit(), commit_end is incremented before verifying
whether the commit succeeded, and the CXL_DECODER_F_ENABLE bit in
cxld->flags is only set after a successful commit. As a result, if the
commit fails, commit_end has been incremented and cxld->reset() has no
effect since the flag is not set, so commit_end remains incorrectly
incremented. The inconsistency between commit_end and CXL_DECODER_F_ENABLE
causes failure during subsequent either commit or reset operations.

Fix this by incrementing commit_end only after confirming the commit
succeeded. Also, remove the ineffective cxld->reset() call. According to
CXL Spec r4.0 8.2.4.20.12 Committing Decoder Programming, since
cxld_await_commit() has cleared the decoder commit bit on failure, no
additional reset is required.

[dj: Fixed commit log 80 char wrapping. ]
[dj: Fix "Fixes" tag to correct hash length. ]
[dj: Change spec to r4.0. ]

Fixes: 176baefb2e ("cxl/hdm: Commit decoder state to hardware")
Signed-off-by: Yuxiong Wang <yuxiong.wang@linux.alibaba.com>
Acked-by: Huang Ying <ying.huang@linux.alibaba.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Link: https://patch.msgid.link/20260129064552.31180-1-yuxiong.wang@linux.alibaba.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
History 2026-03-04 07:20:22 -05:00
..
core cxl: Fix premature commit_end increment on decoder commit failure 2026-03-04 07:20:22 -05:00
acpi.c cxl/acpi: Ensure ports ready at cxl_acpi_probe() return 2024-10-25 16:07:03 -05:00
cxl.h cxl/port: Fix use-after-free, permit out-of-order decoder shutdown 2024-10-25 16:07:03 -05:00
cxlmem.h cxl: Preserve the CDAT access_coordinate for an endpoint 2024-09-22 21:02:53 -07:00
cxlpci.h PCI/CXL: Move CXL Vendor ID to pci_ids.h 2024-05-08 13:18:33 -05:00
Kconfig cxl/port: Fix CXL port initialization order when the subsystem is built-in 2024-10-25 16:06:49 -05:00
Makefile cxl/port: Fix CXL port initialization order when the subsystem is built-in 2024-10-25 16:06:49 -05:00
mem.c cxl/pci: Rename cxl_setup_parent_dport() and cxl_dport_map_regs() 2024-09-03 15:29:33 -07:00
pci.c cxl/pci: Fix potential bogus return value upon successful probing 2024-12-27 14:02:01 +01:00
pmem.c move asm/unaligned.h to linux/unaligned.h 2024-10-02 17:23:23 -04:00
pmu.h cxl/pci: Find and register CXL PMU devices 2023-05-30 11:20:35 -07:00
port.c cxl/port: Fix CXL port initialization order when the subsystem is built-in 2024-10-25 16:06:49 -05:00
security.c move asm/unaligned.h to linux/unaligned.h 2024-10-02 17:23:23 -04:00