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linux/arch/riscv/net
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Radim Krčmář 8a16586fa7 riscv, bpf: use lw when reading int cpu in bpf_get_smp_processor_id 
emit_ld is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
The struct currently has a hole after cpu, so little endian accesses
seemed fine.

Fixes: 2ddec2c80b ("riscv, bpf: inline bpf_get_smp_processor_id()")
Cc: stable@vger.kernel.org
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
Reviewed-by: Pu Lehui <pulehui@huawei.com>
Link: https://lore.kernel.org/r/20250812090256.757273-4-rkrcmar@ventanamicro.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>
History 2025-09-05 15:31:20 -06:00
..
bpf_jit.h bpf, riscv64: Support load-acquire and store-release instructions 2025-05-09 10:05:27 -07:00
bpf_jit_comp32.c riscv, bpf: Introduce shift add helper with Zba optimization 2024-06-03 16:45:23 +02:00
bpf_jit_comp64.c riscv, bpf: use lw when reading int cpu in bpf_get_smp_processor_id 2025-09-05 15:31:20 -06:00
bpf_jit_core.c bpf, riscv64: Skip redundant zext instruction after load-acquire 2025-05-09 10:05:27 -07:00
Makefile riscv, bpf: Add RV32G eBPF JIT 2020-03-05 16:13:47 +01:00