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linux/arch/riscv/kvm
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Fangyu Yu d00b61cd37 RISC-V: KVM: Write hgatp register with valid mode bits 
[ Upstream commit 2b351e3d04 ]

According to the RISC-V Privileged Architecture Spec, when MODE=Bare
is selected,software must write zero to the remaining fields of hgatp.

We have detected the valid mode supported by the HW before, So using a
valid mode to detect how many vmid bits are supported.

Fixes: fd7bb4a251 ("RISC-V: KVM: Implement VMID allocator")
Reviewed-by: Nutty Liu <nutty.liu@hotmail.com>
Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Reviewed-by: Guo Ren (Alibaba DAMO Academy) <guoren@kernel.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: Guo Ren (Alibaba DAMO Academy) <guoren@kernel.org>
Link: https://lore.kernel.org/r/20250821142542.2472079-2-guoren@kernel.org
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
History 2025-10-15 12:03:59 +02:00
..
aia.c RISC-V: KVM: Move HGEI[E|P] CSR access to IMSIC virtualization 2025-07-11 18:33:27 +05:30
aia_aplic.c RISC-V: KVM: Fix APLIC in_clrip and clripnum write emulation 2024-11-05 13:27:28 +05:30
aia_device.c RISC-V: KVM: Drop the return value of kvm_riscv_vcpu_aia_init() 2025-07-28 22:27:07 +05:30
aia_imsic.c RISC-V: KVM: Factor-out g-stage page table management 2025-07-28 22:27:30 +05:30
gstage.c RISC-V: KVM: Pass VMID as parameter to kvm_riscv_hfence_xyz() APIs 2025-07-28 22:27:32 +05:30
Kconfig RISC-V: KVM: Enable ring-based dirty memory tracking 2025-07-28 22:28:22 +05:30
main.c RISC-V: KVM: Factor-out g-stage page table management 2025-07-28 22:27:30 +05:30
Makefile RISC-V: KVM: Factor-out g-stage page table management 2025-07-28 22:27:30 +05:30
mmu.c RISC-V: KVM: Fix pte settings within kvm_riscv_gstage_ioremap() 2025-08-25 10:26:16 +05:30
nacl.c RISC-V: KVM: Add common nested acceleration support 2024-10-28 16:43:57 +05:30
tlb.c RISC-V: KVM: Pass VMID as parameter to kvm_riscv_hfence_xyz() APIs 2025-07-28 22:27:32 +05:30
trace.h RISCV: KVM: add tracepoints for entry and exit events 2024-06-26 18:37:36 +05:30
vcpu.c RISC-V: KVM: Correct kvm_riscv_check_vcpu_requests() comment 2025-08-25 10:26:17 +05:30
vcpu_exit.c RISC-V: KVM: Factor-out g-stage page table management 2025-07-28 22:27:30 +05:30
vcpu_fp.c riscv: Rearrange hwcap.h and cpufeature.h 2023-11-09 10:15:51 -08:00
vcpu_insn.c KVM: riscv: Support guest wrs.nto 2024-07-12 08:54:51 -07:00
vcpu_onereg.c RISC-V: KVM: Fix inclusion of Smnpm in the guest ISA bitmap 2025-07-28 22:27:45 +05:30
vcpu_pmu.c RISC-V: KVM: Disable the kernel perf counter during configure 2025-03-06 09:57:07 +05:30
vcpu_sbi.c RISC-V: KVM: add SBI extension reset callback 2025-07-23 17:19:44 +05:30
vcpu_sbi_base.c RISC-V: KVM: Add ONE_REG interface to enable/disable SBI extensions 2023-04-21 17:38:44 +05:30
vcpu_sbi_hsm.c KVM: RISC-V: refactor sbi reset request 2025-05-21 09:34:49 +05:30
vcpu_sbi_pmu.c RISC-V: KVM: Improve firmware counter read function 2024-04-26 13:13:54 +05:30
vcpu_sbi_replace.c RISC-V: KVM: Pass VMID as parameter to kvm_riscv_hfence_xyz() APIs 2025-07-28 22:27:32 +05:30
vcpu_sbi_sta.c RISC-V: KVM: add SBI extension reset callback 2025-07-23 17:19:44 +05:30
vcpu_sbi_system.c KVM: RISC-V: refactor sbi reset request 2025-05-21 09:34:49 +05:30
vcpu_sbi_v01.c RISC-V: KVM: Pass VMID as parameter to kvm_riscv_hfence_xyz() APIs 2025-07-28 22:27:32 +05:30
vcpu_switch.S RISC-V: KVM: Use SBI sync SRET call when available 2024-10-28 16:44:03 +05:30
vcpu_timer.c RISC-V: KVM: Disable vstimecmp before exiting to user-space 2025-07-11 18:30:17 +05:30
vcpu_vector.c RISC-V: KVM: fix stack overrun when loading vlenb 2025-08-25 10:26:20 +05:30
vm.c RISC-V: KVM: Factor-out g-stage page table management 2025-07-28 22:27:30 +05:30
vmid.c RISC-V: KVM: Write hgatp register with valid mode bits 2025-10-15 12:03:59 +02:00