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Guodong Xu 69132c2d4c Documentation: riscv: uabi: Clarify ISA spec version for canonical order 
Specify that chapter 27 refers to version 20191213 of the RISC-V ISA
Unprivileged Architecture. The chapter numbering differs across
specification versions - for example, in version 20250508, the ISA
Extension Naming Conventions is chapter 36, not chapter 27.

Historical versions of the RISC-V specification can be found via Link [1].

Acked-by: Paul Walmsley <pjw@kernel.org>
Link: https://riscv.org/specifications/ratified/ [1]
Fixes: f07b2b3f9d ("Documentation: riscv: add a section about ISA string ordering in /proc/cpuinfo")
Signed-off-by: Guodong Xu <guodong@riscstar.com>
Link: https://patch.msgid.link/20260115-adding-b-dtsi-v2-1-254dd61cf947@riscstar.com
History 2026-01-14 17:16:23 -07:00
..
acpi.rst docs: move riscv under arch 2023-10-10 13:37:43 -06:00
boot-image-header.rst docs: move riscv under arch 2023-10-10 13:37:43 -06:00
boot.rst docs: move riscv under arch 2023-10-10 13:37:43 -06:00
cmodx.rst RISC-V: Documentation: Add enough title underlines to CMODX 2025-06-05 12:26:07 -07:00
features.rst docs: kernel_feat.py: fix potential command injection 2024-01-11 09:21:01 -07:00
hwprobe.rst riscv: hwprobe: export Zilsd and Zclsd ISA extensions 2025-12-19 00:22:30 -07:00
index.rst documentation: Document PR_RISCV_SET_ICACHE_FLUSH_CTX prctl 2024-04-18 08:10:59 -07:00
patch-acceptance.rst docs: move riscv under arch 2023-10-10 13:37:43 -06:00
uabi.rst Documentation: riscv: uabi: Clarify ISA spec version for canonical order 2026-01-14 17:16:23 -07:00
vector.rst Documentation: Fix spelling mistakes 2024-09-05 14:35:45 -06:00
vm-layout.rst Revert "RISC-V: mm: Document mmap changes" 2024-08-29 06:03:24 -07:00