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linux/include/soc
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Colin Foster b1ca2f1b04 net: mscc: ocelot: un-export unused regmap symbols 
There are no external users of the vsc7514_*_regmap[] symbols or
vsc7514_vcap_* functions. They were exported in commit 32ecd22ba6 ("net:
mscc: ocelot: split register definitions to a separate file") with the
intention of being used, but the actual structure used in commit
2efaca411c ("net: mscc: ocelot: expose vsc7514_regmap definition") ended
up being all that was needed.

Bury these unnecessary symbols.

Signed-off-by: Colin Foster <colin.foster@in-advantage.com>
Suggested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20230204182056.25502-1-colin.foster@in-advantage.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
History 2023-02-06 22:33:15 -08:00
..
amlogic perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver 2022-11-21 18:28:45 +00:00
arc clocksource/drivers/arc_timer: Eliminate redefined macro error 2021-10-16 22:15:01 +02:00
at91 ARM: at91: pm: avoid soft resetting AC DLL 2022-11-01 12:25:19 +02:00
bcm2835 firmware: raspberrypi: Fix type assignment 2023-01-10 13:44:04 -08:00
canaan clk: Add RISC-V Canaan Kendryte K210 clock driver 2021-02-22 17:51:04 -08:00
fsl soc: fsl: qe: request pins non-exclusively 2022-12-05 18:19:34 +01:00
imx ARM: imx: Initialize SoC ID on i.MX50 2021-05-13 15:42:21 +08:00
mediatek memory: mtk-smi: Add enable IOMMU SMC command for MM master 2022-08-30 20:54:05 +03:00
microchip clk: microchip: mpfs: add reset controller 2022-09-14 10:55:17 +03:00
mscc net: mscc: ocelot: un-export unused regmap symbols 2023-02-06 22:33:15 -08:00
qcom soc: qcom: spmi-pmic: add more PMIC SUBTYPE IDs 2022-10-17 14:56:14 -05:00
rockchip soc: rockchip: power-domain: Manage resource conflicts with firmware 2022-05-09 03:36:52 +09:00
sa1100 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
sifive soc: sifive: ccache: Rename SiFive L2 cache to Composable cache. 2022-10-13 11:06:51 -07:00
tegra drm for 6.2: 2022-12-13 11:59:58 -08:00