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Add a new driver for loading binary firmware to configuration RAM using "SPI passive mode" on Efinix FPGAs. Efinix passive SPI configuration requires chip select to remain asserted from reset until the complete bitstream and trailing idle clocks have been transferred, so the driver keeps CS active with cs_change and locks the SPI bus for the duration of configuration. Signed-off-by: Ian Dannapel <iansdannapel@gmail.com> Reviewed-by: Xu Yilun <yilun.xu@intel.com> Link: https://lore.kernel.org/r/20260416144237.373852-4-iansdannapel@gmail.com Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>
63 lines
2.4 KiB
63 lines
2.4 KiB