linux/arch/riscv/lib
Shao Mingyin 282f4a8aa9 riscv: lib: Fix ZBB strnlen wrap-around regression on huge counts
The aligned scan boundary is derived from the last valid byte,
(s + count - 1).  When count is huge (e.g. SIZE_MAX, which FORTIFY
strcat/strlcat pass when the destination size is not known at compile
time), s + count wraps around and the boundary lands before s, so the
ZBB path returns a bogus length.  The original implementation
(5ba15d419f) had the same wrap-around in its (s + count) & ~7
boundary computation; after 5d588c6848 the wrapped boundary is caught
by the pre-loop guard "bgeu t0, t4, 2f", which then always exits for
aligned strings of 8 or more characters and strnlen() returns 8
instead of the real length.

This silently truncates strings built by fortified strcat: the dm
sysfs name attribute shows "live-bas" instead of "live-base", the
truncated name pollutes the udev database, and blivet/anaconda (as
well as LVM/dm-crypt/multipath userspace) break on RISC-V systems.

Detect the wrap-around and saturate the boundary to the top of the
address space, making the scan equivalent to strlen().  The saturation
clamps the increment to ~s, so it stays branchless and wrap-free:

	s + min(count - 1, ~s) == saturating_add(s, count - 1)

Normal counts are unaffected.

Fixes: 5ba15d419f ("riscv: lib: add strnlen() implementation")
Cc: stable@vger.kernel.org
Suggested-by: David Laight <david.laight.linux@gmail.com>
Suggested-by: Qingfang Deng <qingfang.deng@linux.dev>
Signed-off-by: Shao Mingyin <shao.mingyin@zte.com.cn>
Acked-by: Michael Neuling <mikey@neuling.org>
Tested-by: Troy Mitchell <troy.mitchell@linux.dev>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Link: https://patch.msgid.link/20260915152656708z04s4oSYY2BGj34F36RZa@zte.com.cn
Signed-off-by: Paul Walmsley <pjw@kernel.org>
History 2026-10-05 19:02:38 -06:00
..
ashldi3.S riscv: add platform-specific double word shifts for riscv32 2026-05-28 21:24:51 -07:00
ashrdi3.S riscv: add platform-specific double word shifts for riscv32 2026-05-28 21:24:51 -07:00
clear_page.S use linux/export.h rather than asm-generic/export.h 2024-01-09 20:10:40 -08:00
csum.c riscv: fix various typos in comments and code 2026-04-04 18:42:39 -06:00
delay.c calibrate: Rework delay timer calibration 2026-07-15 15:04:55 +02:00
error-inject.c riscv: Add support for function error injection 2021-01-14 15:09:09 -08:00
lshrdi3.S riscv: add platform-specific double word shifts for riscv32 2026-05-28 21:24:51 -07:00
Makefile riscv: add platform-specific double word shifts for riscv32 2026-05-28 21:24:51 -07:00
memcpy.S riscv: Use SYM_*() assembly macros instead of deprecated ones 2023-11-06 09:42:47 -08:00
memmove.S riscv: fix various typos in comments and code 2026-04-04 18:42:39 -06:00
memset.S RISC-V: lib: Add pi aliases for string functions 2024-08-05 12:06:39 -07:00
riscv_v_helpers.c riscv: make unsafe user copy routines use existing assembly routines 2025-06-05 11:39:15 -07:00
strchr.S riscv: lib: add strchr() implementation 2026-04-04 18:42:44 -06:00
strcmp.S RISC-V: separate Zbb optimisations requiring and not requiring toolchain support 2025-03-18 08:53:02 +00:00
strlen.S riscv: lib: optimize strlen loop efficiency 2026-02-09 15:27:33 -07:00
strncmp.S RISC-V: separate Zbb optimisations requiring and not requiring toolchain support 2025-03-18 08:53:02 +00:00
strnlen.S riscv: lib: Fix ZBB strnlen wrap-around regression on huge counts 2026-10-05 19:02:38 -06:00
strrchr.S riscv: lib: add strrchr() implementation 2026-04-04 18:42:44 -06:00
tishift.S use linux/export.h rather than asm-generic/export.h 2024-01-09 20:10:40 -08:00
uaccess.S riscv: skip software algning code for HAVE_EFFICIENT_UNALIGNED_ACCESS 2026-09-02 11:47:08 -06:00
uaccess_vector.S riscv: make unsafe user copy routines use existing assembly routines 2025-06-05 11:39:15 -07:00