Clock driver for RV1106, fix for rk3576 spi source mux, better representing

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fractional PLL coefficients and a fix for the dclk of the 3rd video-port to
 not affect other compoents when its rate gets changed.
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Merge tag 'v7.3-rockchip-clk1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip

Pull Rockchip clk driver updates from Heiko Stuebner:

 - Clock driver for Rockchip RV1106
 - Fix for Rockchip rk3576 spi source mux
 - Better representing fractional PLL coefficients in Rockchip
   clk driver
 - Fix for the Rockchip dclk of the 3rd video-port to not affect
   other compoents when its rate gets changed

* tag 'v7.3-rockchip-clk1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: rk3576: fix source muxes for SPI0..SPI4
  clk: rockchip: Add clock controller for the RV1106
  dt-bindings: clock: rockchip: Add RV1106 CRU support
  clk: rockchip: Fractional PLL coefficient on RK3588/RK3576 is two's complement
  clk: rockchip: Fix the fractional part denominator on RK3588/RK3576 PLLs
  clk: rockchip: rk3588: Allow VP2 the same sourcing options as other VPs
  clk: rockchip: rk3588: Don't change PLL rates when setting dclk_vop2_src

...

This commit is contained in:

Stephen Boyd 2026-08-11 23:03:45 -07:00

parent 8cdeaa50ea 586ff159ec

commit 1353d95e63

9 changed files with 1500 additions and 18 deletions

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60

Documentation/devicetree/bindings/clock/rockchip,rv1106-cru.yaml

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7

drivers/clk/rockchip/Kconfig

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1

drivers/clk/rockchip/Makefile

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16

drivers/clk/rockchip/clk-pll.c

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15

drivers/clk/rockchip/clk-rk3576.c

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6

drivers/clk/rockchip/clk-rk3588.c

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1099

drivers/clk/rockchip/clk-rv1106.c

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8

drivers/clk/rockchip/clk.h

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306

include/dt-bindings/clock/rockchip,rv1106-cru.h

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