clk: renesas: r9a07g044: Add OSTM clock and reset entries

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Add OSTM{0,1,2} clock and reset entries to CPG driver.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211110082019.28554-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Biju Das 2021-11-10 08:20:19 +00:00 • committed by Geert Uytterhoeven

parent dc446cba43

commit 161450134a

1 changed files with 9 additions and 0 deletions

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drivers/clk/renesas/r9a07g044-cpg.c

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