drm/xe: Consolidate semaphore instruction definitions

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Drop the definition of MI_SEMAPHORE_WAIT_TOKEN and replace its uses with
MI_SEMAPHORE_WAIT.  Both #define's were representing the same opcode
0x1C and this GPU instruction has always been named "MI_SEMAPHORE_WAIT"
in the official specs.

The "*_TOKEN" definition appears to have been copied from i915's code.
i915 needed two separate definitions to reflect the slightly different
instruction lengths gen8-gen11 platforms (4 dwords) vs gen12 and later
platforms (5 dwords, with the extra dword representing a token), but Xe
only supports newer platforms with the 5-dword form, so only a single
definition is needed and should match the official name given in the
specs.

Bspec: 14054, 45749, 60244
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patch.msgid.link/20260917-semaphore_inst-v1-1-61e49405f71d@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

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This commit is contained in:

Matt Roper 2026-09-17 15:33:39 -07:00

parent 3bc497a401

commit 25a7255afb

2 changed files with 3 additions and 8 deletions

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7

drivers/gpu/drm/xe/instructions/xe_mi_commands.h

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4

drivers/gpu/drm/xe/xe_ring_ops.c

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