perf/x86/intel: Allocate arch-PEBS buffer and initialize PEBS_BASE MSR

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Arch-PEBS introduces a new MSR IA32_PEBS_BASE to store the arch-PEBS
buffer physical address. This patch allocates arch-PEBS buffer and then
initialize IA32_PEBS_BASE MSR with the buffer physical address.

Co-developed-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://patch.msgid.link/20251029102136.61364-10-dapeng1.mi@linux.intel.com

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Dapeng Mi 2025-10-29 18:21:33 +08:00 • committed by Peter Zijlstra

parent d21954c8a0

commit 2721e8da2d

4 changed files with 92 additions and 15 deletions

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11

arch/x86/events/intel/core.c

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82

arch/x86/events/intel/ds.c

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11

arch/x86/events/perf_event.h

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3

arch/x86/include/asm/intel_ds.h

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