drm/i915/guc: New GuC scratch registers for Gen11

Browse source

Gen11 adds new set of scratch registers that can be used for MMIO
based Host-to-Guc communication. Due to limited number of these
registers it is expected that host will use them only for command
transport buffers (CTB) communication setup if one is available.

Bspec: 21044

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190527183613.17076-10-michal.wajdeczko@intel.com

...

This commit is contained in:

Michal Wajdeczko 2019-05-27 18:36:05 +00:00 • committed by Chris Wilson

parent 4a1f9dc119

commit 2d4ed3a988

2 changed files with 12 additions and 3 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

12

drivers/gpu/drm/i915/intel_guc.c

View file

3

drivers/gpu/drm/i915/intel_guc_reg.h

View file