clk: sunxi-ng: mp: Adjust parent rate for pre-dividers

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commit ac8616e4c8 upstream.

The MP style clocks support an mux with pre-dividers. While the driver
correctly accounted for them in the .determine_rate callback, it did
not in the .recalc_rate and .set_rate callbacks.

This means when calculating the factors in the .set_rate callback, they
would be off by a factor of the active pre-divider. Same goes for
reading back the clock rate after it is set.

Fixes: 2ab836db50 ("clk: sunxi-ng: Add M-P factor clock support")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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Chen-Yu Tsai 2017-02-14 11:35:22 +08:00 • committed by Greg Kroah-Hartman

parent 867f7804ce

commit 35ef543eb3

1 changed files with 8 additions and 0 deletions

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drivers/clk/sunxi-ng/ccu_mp.c

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