drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS

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According to i915 commit
ad8ebf1221 ("drm/i915/gt: Ensure memory quiesced before invalidation")
quiescing of the memory traffic is required before invalidating the AuxCCS
tables.

Add an extra pipe control flush to achieve that.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patch.msgid.link/20260324084018.20353-5-tvrtko.ursulin@igalia.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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Tvrtko Ursulin 2026-03-24 08:40:10 +00:00 • committed by Rodrigo Vivi

parent 88139af77d

commit 458b1e64e7

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GPG key ID: FA625F640EEB13CA

1 changed files with 9 additions and 1 deletions

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drivers/gpu/drm/xe/xe_ring_ops.c

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