riscv: misaligned: factorize trap handling

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[ Upstream commit fd94de9f9e ]

Since both load/store and user/kernel should use almost the same path and
that we are going to add some code around that, factorize it.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250422162324.956065-2-cleger@rivosinc.com
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Stable-dep-of: 453805f0a2 ("riscv: misaligned: enable IRQs while handling misaligned accesses")
Signed-off-by: Sasha Levin <sashal@kernel.org>

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Clément Léger 2025-04-22 18:23:08 +02:00 • committed by Greg Kroah-Hartman

parent 19fa2a4830

commit 45a0697cee

1 changed files with 36 additions and 30 deletions

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arch/riscv/kernel/traps.c

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