clk: renesas: r9a07g043: Add clock and reset entries for SPI Multi I/O Bus Controller

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Add clock and reset entries for SPI Multi I/O Bus Controller.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220501083450.26541-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Biju Das 2022-05-01 09:34:47 +01:00 • committed by Geert Uytterhoeven

parent 67f80edf83

commit 4e683604cf

1 changed files with 18 additions and 0 deletions

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drivers/clk/renesas/r9a07g043-cpg.c

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