clk: tegra: Fix cclk_lp divisor register

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According to comments in code and common sense, cclk_lp uses its
own divisor, not cclk_g's.

Fixes: b08e8c0ecc ("clk: tegra: add clock support for Tegra30")
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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Michał Mirosław 2017-09-19 04:48:10 +02:00 • committed by Thierry Reding

parent d80a32fe98

commit 54eff2264d

1 changed files with 1 additions and 1 deletions

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drivers/clk/tegra/clk-tegra30.c

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