media: ccs: Add support for lane speed model

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Convey the relevant PLL flags to the PLL calculator. Also the lane speed
model affects how the link rate is calculated on the CSI-2 bus, as the
rate is total of all lanes.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>

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Sakari Ailus 2020-09-23 12:16:03 +02:00 • committed by Mauro Carvalho Chehab

parent cac8f5d28e

commit 585e17c984

1 changed files with 10 additions and 1 deletions

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drivers/media/i2c/ccs/ccs-core.c

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