clk: meson: add the gxl hdmi pll

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The hdmi pll used in the gxl family is actually different from the gxbb
one. The register layout is completely different, which explain why the
hdmi pll rate has always been rubbish on the gxl family.

Adding the correct register field is the first part of the fix to get a
correct rate out the hdmi pll

Fixes: 0d48fc558d ("clk: meson-gxbb: Add GXL/GXM GP0 Variant")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>

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This commit is contained in:

Jerome Brunet 2018-01-19 16:55:26 +01:00

parent 7d3142e5d6

commit 69d9229327

1 changed files with 48 additions and 2 deletions

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drivers/clk/meson/gxbb.c

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