clk: renesas: rzg2l: Add PLL5_4 clk mux support

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Add PLL5_4 clk mux support to select clock from clock
sources FOUTPOSTDIV and FOUT1PH0.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220430114156.6260-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Biju Das 2022-04-30 12:41:49 +01:00 • committed by Geert Uytterhoeven

parent 1561380ee7

commit 6cc859cae9

2 changed files with 103 additions and 0 deletions

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93

drivers/clk/renesas/rzg2l-cpg.c

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10

drivers/clk/renesas/rzg2l-cpg.h

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