clk: renesas: rzg3e: Add support for DSI clocks

RZ/G3E Clock Pulse Generator PLLDSI limits, shared by clock and MIPI DSI
 driver source files.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCafiLmgAKCRCKwlD9ZEnx
 cIWWAQD+e57m9HGyHasn9GsoTyTGQqwnnpBJYluzhWbpQAk4XQD9G1EG968r0KoH
 EkmFwA2XmllNYXASJB5HKlRLHh8RAQY=
 =0942
 -----END PGP SIGNATURE-----

Merge tag 'clk-renesas-rzg3e-plldsi-tag' into renesas-clk-for-v7.2

clk: renesas: rzg3e: Add support for DSI clocks

RZ/G3E Clock Pulse Generator PLLDSI limits, shared by clock and MIPI DSI
driver source files.
This commit is contained in:
Geert Uytterhoeven 2026-05-04 14:09:33 +02:00
commit 6edb69b808
4 changed files with 297 additions and 0 deletions