x86/intel_rdt: Limit C-states dynamically when pseudo-locking active

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Deeper C-states impact cache content through shrinking of the cache or
flushing entire cache to memory before reducing power to the cache.
Deeper C-states will thus negatively impact the pseudo-locked regions.

To avoid impacting pseudo-locked regions C-states are limited on
pseudo-locked region creation so that cores associated with the
pseudo-locked region are prevented from entering deeper C-states.
This is accomplished by requesting a CPU latency target which will
prevent the core from entering C6 across all supported platforms.

Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: fenghua.yu@intel.com
Cc: tony.luck@intel.com
Cc: vikas.shivappa@linux.intel.com
Cc: gavin.hindman@intel.com
Cc: jithu.joseph@intel.com
Cc: dave.hansen@intel.com
Cc: hpa@zytor.com
Link: https://lkml.kernel.org/r/1ef4f99dd6ba12fa6fb44c5a1141e75f952b9cd9.1529706536.git.reinette.chatre@intel.com

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Reinette Chatre 2018-06-22 15:42:30 -07:00 • committed by Thomas Gleixner

parent f3be1e7b2c

commit 6fc0de37f6

3 changed files with 87 additions and 4 deletions

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4

Documentation/x86/intel_rdt_ui.txt

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2

arch/x86/kernel/cpu/intel_rdt.h

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85

arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c

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