riscv: dts: microchip: icicle: update pci address properties

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For the v2022.09 reference design the PCI root port's data region has
been moved to FIC1 from FIC0. This is a shorter path, allowing for
higher clock rates and improved through-put. As a result, the address at
which the PCIe's data region appears to the core complex has changed.
The config region's address is unchanged.

As FIC0 is no longer used, its clock can be removed too.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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Conor Dooley 2022-09-27 12:19:18 +01:00

parent 99d451a7db

commit 6fc655ed49

1 changed files with 5 additions and 5 deletions

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arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi

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