clk: tegra: Micro-optimize Tegra210 clock setup

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sor_safe being the parent of the dpaux and dpaux1 clocks, it's not only
natural, but also slightly more efficient, to initialize it before its
children. This avoids orphaning the dpaux and dpaux1 clocks only to get
them reparented when the sor_safe clock is registered.

Acked-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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Thierry Reding 2016-06-23 12:52:31 +02:00

parent 2e34c2ac16

commit 74d3ba0b6f

1 changed files with 4 additions and 4 deletions

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drivers/clk/tegra/clk-tegra210.c

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