clk: sunxi: Add driver for A80 MMC config clocks/resets

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On the A80 SoC, the 4 mmc controllers each have a separate register
controlling their register access clocks and reset controls. These
registers in turn share a ahb clock gate and reset control.

This patch adds a platform device driver for these controls. It
requires both clocks and reset controls to be available, so using
CLK_OF_DECLARE might not be the best way.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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Chen-Yu Tsai 2015-01-20 23:46:31 +08:00 • committed by Maxime Ripard

parent 61af4d8dce

commit 7a6fca879f

3 changed files with 244 additions and 1 deletions

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25

Documentation/devicetree/bindings/clock/sunxi.txt

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1

drivers/clk/sunxi/Makefile

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219

drivers/clk/sunxi/clk-sun9i-mmc.c

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