perf/x86/intel: Update event constraints and cache_extra_regsfor SRF

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Update perf hard-coded event constraints and cache_extra_regs[] for
Sierra Forest according to the latest SRF perfmon events (V1.17).

SRF has same uarch (crestmont) as MTL E-core and shares same perf
events, so directly apply the crestmont perf events.

SRF perfmon events:
https://github.com/intel/perfmon/blob/main/SRF/events/sierraforest_core.json

Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://patch.msgid.link/20260515061143.338553-11-dapeng1.mi@linux.intel.com

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Dapeng Mi 2026-05-15 14:11:42 +08:00 • committed by Peter Zijlstra

parent 42f47511d9

commit 7ae5f58517

1 changed files with 1 additions and 2 deletions

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arch/x86/events/intel/core.c

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