clk: at91: fix recalc_rate implementation of PLL driver

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Use the cached values to calculate PLL rate instead of the register values.
This is required to prevent erroneous PLL rate return when the PLL rate
has been configured but the PLL is not prepared yet.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Reported-by: Gaël PORTAY <gael.portay@gmail.com>
Tested-by: Gaël PORTAY <gael.portay@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

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Boris BREZILLON 2014-09-02 09:50:16 +02:00 • committed by Mike Turquette

parent 3ef9dd2bab

commit 87e2ed338f

1 changed files with 3 additions and 8 deletions

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11

drivers/clk/at91/clk-pll.c

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