drm/i915/cdclk: Stop forcing voltage level to 3 all the time on DG2

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SKL_CDCLK_PREPARE_FOR_CHANGE == DISPLAY_TO_PCODE_VOLTAGE(3) so
we are currently forcing the voltage level to 3 all the time on
DG2. Remove SKL_CDCLK_PREPARE_FOR_CHANGE from the mask to avoid
this.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260826134033.13976-6-ville.syrjala@linux.intel.com

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Ville Syrjälä 2026-08-26 16:40:24 +03:00

parent e68e1b80d1

commit 934b9973f7

1 changed files with 0 additions and 1 deletions

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drivers/gpu/drm/i915/display/intel_cdclk.c

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