clk: renesas: rcar-gen4: Remove unused default PLL2/3/4/6 configs

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The default PLL2/3/4/6 multiplier and divider configurations are no
longer used after the conversion to fixed or variable fractional PLL
clock types.

Note that the default configurations are still documented in the
comments above the individual rcar_gen4_cpg_pll_config instances.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/d13526a86066992d6afdf9bee7c1a18da72f914f.1721648548.git.geert+renesas@glider.be

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This commit is contained in:

Geert Uytterhoeven 2024-07-22 13:50:35 +02:00

parent f7444f0fde

commit 93d46d465f

5 changed files with 20 additions and 28 deletions

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10

drivers/clk/renesas/r8a779a0-cpg-mssr.c

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10

drivers/clk/renesas/r8a779f0-cpg-mssr.c

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10

drivers/clk/renesas/r8a779g0-cpg-mssr.c

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10

drivers/clk/renesas/r8a779h0-cpg-mssr.c

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8

drivers/clk/renesas/rcar-gen4-cpg.h

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