clk: rockchip: fix wrong mmc sample phase shift for rk3328

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commit 82f4b67f01 upstream.

mmc sample shift is 0 for RK3328 referring to the TRM.
So fix them.

Fixes: fe3511ad8a ("clk: rockchip: add clock controller for rk3328")
Cc: stable@vger.kernel.org
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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Ziyuan Xu 2018-10-11 15:26:43 +08:00 • committed by Greg Kroah-Hartman

parent 1a2502d376

commit a3eeeed107

1 changed files with 4 additions and 4 deletions

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drivers/clk/rockchip/clk-rk3328.c

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