clk: renesas: Updates for v6.20

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- Add Expanded Serial Peripheral Interface (xSPI) clocks and resets on
     RZ/T21H and RZ/N2H,
   - Add DMAC, interrupt controller (ICU), SPI, and thermal (TSU) clocks
     and resets on RZ/V2N,
   - Add more serial (RSCI) clocks and resets on RZ/V2H and RZ/V2N,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-clk-for-v6.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

 - Add Expanded Serial Peripheral Interface (xSPI) clocks and resets on
   Renesas RZ/T21H and RZ/N2H
 - Add DMAC, interrupt controller (ICU), SPI, and thermal (TSU) clocks
   and resets on Renesas RZ/V2N
 - Add more serial (RSCI) clocks and resets on Renesas RZ/V2H and RZ/V2N

* tag 'renesas-clk-for-v6.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: r9a09g056: Add clock and reset entries for TSU
  clk: renesas: r9a09g057: Add entries for RSCIs
  clk: renesas: r9a09g056: Add entries for RSCIs
  clk: renesas: r9a09g056: Add entries for the RSPIs
  clk: renesas: r9a09g056: Add entries for ICU
  clk: renesas: r9a09g056: Add entries for the DMACs
  clk: renesas: r9a09g077: Propagate rate changes through mux parents
  clk: renesas: r9a09g077: Add xSPI core and module clocks
  clk: renesas: rzg2l: Select correct div round macro
  clk: renesas: rzg2l: Fix intin variable size
  dt-bindings: clock: renesas,r9a09g077/87: Add XSPI0/1 IDs

...

This commit is contained in:

Stephen Boyd 2026-01-15 18:31:49 -08:00

parent 8f0b4cce44 ebb3acf4d7

commit a46a9cd19b

6 changed files with 502 additions and 7 deletions

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178

drivers/clk/renesas/r9a09g056-cpg.c

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126

drivers/clk/renesas/r9a09g057-cpg.c

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195

drivers/clk/renesas/r9a09g077-cpg.c

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6

drivers/clk/renesas/rzg2l-cpg.c

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include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h

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include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h

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