clk: imx: correct pfdv2 gate_bit/vld_bit operations

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The operations of pfdv2 gate_bit/valid_bit are incorrect,
they are defined as u8 for bit offset, but gate_bit is
actually assigned as mask which could be 32 bit long and
it causes overflow, and vld_bit is assigned as bit offset
based on incorrect gate_bit value, it causes incorrect
pfd clock gate status in clock tree, this patch fixes the
issue by assigning them as correct bit offset.

Fixes: 9fcb6be3b6 ("clk: imx: add pfdv2 support")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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Anson Huang 2019-04-26 06:53:14 +00:00 • committed by Stephen Boyd

parent 53dd5c709b

commit a5a627c676

1 changed files with 5 additions and 5 deletions

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drivers/clk/imx/clk-pfdv2.c

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