x86/its: Enumerate Indirect Target Selection (ITS) bug

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commit 159013a7ca upstream.

ITS bug in some pre-Alderlake Intel CPUs may allow indirect branches in the
first half of a cache line get predicted to a target of a branch located in
the second half of the cache line.

Set X86_BUG_ITS on affected CPUs. Mitigation to follow in later commits.

Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

...

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Pawan Gupta 2024-06-21 17:40:41 -07:00 • committed by Greg Kroah-Hartman

parent 76f847655b

commit a6f2a436e9

4 changed files with 58 additions and 13 deletions

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arch/x86/include/asm/cpufeatures.h

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8

arch/x86/include/asm/msr-index.h

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58

arch/x86/kernel/cpu/common.c

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arch/x86/kvm/x86.c

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