clk: renesas: rcar-gen3: Fix cpg_sd_clock_round_rate() return value

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cpg_sd_clock_round_rate() may return an unsupported clock rate for the
requested clock rate. Therefore, when cpg_sd_clock_set_rate() sets the
clock rate acquired by cpg_sd_clock_round_rate(), an error may occur.

This is not conform the clk API design.

This patch fixes that by making sure cpg_sd_clock_calc_div() considers
only the division values defined in cpg_sd_div_table[].
With this fix, the cpg_sd_clock_round_rate() always return a support
clock rate.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Fixes: 90c073e539 ("clk: shmobile: r8a7795: Add SD divider support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

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This commit is contained in:

Takeshi Kihara 2019-02-25 11:48:38 +09:00 • committed by Geert Uytterhoeven

parent 21ab095cbc

commit b953eaaeb5

1 changed files with 14 additions and 16 deletions

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drivers/clk/renesas/rcar-gen3-cpg.c

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