drm/i915: Allow p1 divider 2 on VLV

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According to VLV2_DPLL_mphy_hsdpll_frequency_table_ww6_rev1p1.xlsm p1
can be 2-3 always.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

...

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Ville Syrjälä 2013-09-24 21:26:26 +03:00 • committed by Daniel Vetter

parent 811bbf0544

commit b99ab66301

1 changed files with 1 additions and 1 deletions

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2

drivers/gpu/drm/i915/intel_display.c

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