arm64: dts: imx8mm-venice-gw7901: Increase HS400 USDHC clock speed

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The IMX8M reference manuals indicate in the USDHC Clock generator section
that the clock rate for DDR is 1/2 the input clock therefore HS400 rates
clocked at 200Mhz require a 400Mhz SDHC clock.

This showed about a 1.5x improvement in read performance for the eMMC's
used on the various imx8m{m,n,p}-venice boards.

Fixes: 2b1649a83a ("arm64: dts: imx: Add i.mx8mm Gateworks gw7901 dts support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://lore.kernel.org/stable/20250707201702.2930066-3-tharvey%40gateworks.com
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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Tim Harvey 2025-07-07 13:16:58 -07:00 • committed by Shawn Guo

parent 81b07d51cd

commit bd49cb58b5

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arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts

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