drm/msm/adreno: a5xx: Explicitly program the CP0 performance counter

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Even though the default countable for CP0 is CP_ALWAYS_COUNT (0),
program the selector during HW initialization in an effort to be
up front about which counters are programmed and why.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

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Jordan Crouse 2017-11-21 12:40:57 -07:00 • committed by Rob Clark

parent f56d9df656

commit c09513cfeb

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drivers/gpu/drm/msm/adreno/a5xx_gpu.c

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