clk: thead: th1520-ap: set all AXI clocks to CLK_IS_CRITICAL

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The AXI crossbar of TH1520 has no proper timeout handling, which means
gating AXI clocks can easily lead to bus timeout and thus system hang.

Set all AXI clock gates to CLK_IS_CRITICAL. All these clock gates are
ungated by default on system reset.

In addition, convert all current CLK_IGNORE_UNUSED usage to
CLK_IS_CRITICAL to prevent unwanted clock gating.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Drew Fustini <fustini@kernel.org>
Signed-off-by: Drew Fustini <fustini@kernel.org>

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Icenowy Zheng 2025-08-16 17:11:13 +08:00 • committed by Drew Fustini

parent 8fede7ff69

commit c567bc5fc6

1 changed files with 22 additions and 22 deletions

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drivers/clk/thead/clk-th1520-ap.c

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