clk: aspeed: Fix is_enabled for certain clocks

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Some of the Aspeed clocks are disabled by setting the relevant bit in
the "clock stop control" register to one, while others are disabled by
setting their bit to zero. The driver already uses a flag per gate  to
identify this behavior, but doesn't apply it in the clock is_enabled
function.

Use the existing gate flag to correctly return whether or not a clock
is enabled in the aspeed_clk_is_enabled function.

Signed-off-by: Eddie James <eajames@linux.vnet.ibm.com>
Fixes: 6671507f0f ("clk: aspeed: Handle inverse polarity of USB port 1 clock gate")
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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Eddie James 2018-03-08 14:57:19 -06:00 • committed by Stephen Boyd

parent 55c19eee3b

commit d90c76bb61

1 changed files with 2 additions and 1 deletions

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drivers/clk/clk-aspeed.c

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