x86/cpu: Add Xeon Icelake-D to list of CPUs that support PPIN

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Missed adding the Icelake-D CPU to the list. It uses the same MSRs
to control and read the inventory number as all the other models.

Fixes: dc6b025de9 ("x86/mce: Add Xeon Icelake to list of CPUs that support PPIN")
Reported-by: Ailin Xu <ailin.xu@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20220121174743.1875294-2-tony.luck@intel.com

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Tony Luck 2022-01-21 09:47:38 -08:00 • committed by Borislav Petkov

parent 1f52b0aba6

commit e464121f2d

1 changed files with 1 additions and 0 deletions

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arch/x86/kernel/cpu/mce/intel.c

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