clk: renesas: Fixes for v7.0

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- Fix ordering of module clocks arrays on RZ/V2H(P) and RZ/V2N,
   - Remove clocks for watchdogs meant for other CPU cores on the
     RZ/V2H(P) SoC.
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Merge tag 'renesas-clk-fixes-for-v7.0-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-fixes

Pull Renesas clk driver fixes from Geert Uytterhoeven:

 - Fix ordering of module clocks arrays on Renesas RZ/V2H(P) and RZ/V2N
 - Remove clocks for watchdogs meant for other CPU cores on the
   Renesas RZ/V2H(P) SoC

* tag 'renesas-clk-fixes-for-v7.0-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: r9a09g057: Remove entries for WDT{0,2,3}
  clk: renesas: r9a09g056: Fix ordering of module clocks array
  clk: renesas: r9a09g057: Fix ordering of module clocks array

...

This commit is contained in:

Stephen Boyd 2026-03-23 17:11:31 -07:00

parent c369299895 1b4f047dc4

commit e7a45dec40

2 changed files with 38 additions and 53 deletions

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36

drivers/clk/renesas/r9a09g056-cpg.c

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55

drivers/clk/renesas/r9a09g057-cpg.c

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