clk: renesas: Fixes for v6.1

- Correct the parent clocks for the High Speed Serial Communication
     Interfaces with FIFO (HSCIF) modules on the R-Car V4H SoC.
     Note that HSCIF0 is used for the serial console on the White-Hawk
     development board.
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Merge tag 'renesas-clk-fixes-for-v6.1-tag1'

clk: renesas: Fixes for v6.1

  - Correct the parent clocks for the High Speed Serial Communication
    Interfaces with FIFO (HSCIF) modules on the R-Car V4H SoC.
    Note that HSCIF0 is used for the serial console on the White-Hawk
    development board.
This commit is contained in:
Geert Uytterhoeven 2022-10-26 12:37:51 +02:00
commit f5684bde03