perf/x86/intel/uncore: Add Sapphire Rapids server M2M support

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The M2M blocks manage the interface between the mesh (operating on both
the mesh and the SMI3 protocol) and the memory controllers.

The layout of the control registers for a M2M uncore unit is a little
 bit different from the generic one. So a specific format and ops are
required. Expose the common PCI ops which can be reused.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lore.kernel.org/r/1625087320-194204-9-git-send-email-kan.liang@linux.intel.com

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Kan Liang 2021-06-30 14:08:32 -07:00 • committed by Peter Zijlstra

parent 85f2e30f98

commit f57191edaa

3 changed files with 44 additions and 8 deletions

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14

arch/x86/events/intel/uncore_discovery.c

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8

arch/x86/events/intel/uncore_discovery.h

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30

arch/x86/events/intel/uncore_snbep.c

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