clk: mediatek: mt8135: Fix inverted gate control for devapc_ck

The devapc_ck (CLK_INFRA_DEVAPC) on MT8135 is currently using
"mtk_clk_gate_ops_setclr". However, checking the downstream kernel reveals
that this clock is configured with set:enable and clr:disable making
"mtk_clk_gate_ops_setclr_inv" the appropriate choice.
But, it is strange that some downstream kernels are not like that.

Amazon: INV
ChromiumOS (early): not INV
ChromiumOS 3.16 to 3.18-revew-v2: INV
ChromiumOS 3.18-review-v3 and later (sent to kernel.org): not INV

Link: e2b2163a8e/arch/arm/mach-mt8135/mt_clkmgr.c (L1022-L1028)
Link: 4b624ee66e/arch/arm/boot/dts/mt8135-clocks.dtsi (L944-L948)
Link: decd80c01d/drivers/clk/mediatek/clk-mt8135.c (L881-L882)
Link: 9b6f06cb76/drivers/clk/mediatek/clk-mt8135.c (L450)
Fixes: a8aede7948 ("clk: mediatek: Add basic clocks for Mediatek MT8135.")
Signed-off-by: Akari Tsuyukusa <akkun11.open@gmail.com>
Signed-off-by: Brian Masney <bmasney@redhat.com>
This commit is contained in:
Akari Tsuyukusa 2026-06-29 22:20:43 +09:00 • committed by Brian Masney
commit fd0e3e4ede