Our CSI endpoint trigger some DTC warnings due to the fact that we're
having a single endpoint that doesn't need any reg property, and since
we don't have a reg property, we don't need the address-cells and
size-cells properties anymore.
Fix those
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-13-maxime@cerno.tech
While the USB PHY Device Tree mandates that the name of the ID detect pin
should be usb0_id_det-gpios, a significant number of device tree use
usb0_id_det-gpio instead.
This was functional because the GPIO framework falls back to the gpio
suffix that is legacy, but we should fix this.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-12-maxime@cerno.tech
Even though it translates to the same thing down to the binary level, we
should have an array of 2 number cells to describe each voltage state,
which in turns create a validation warning.
Let's fix this.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-11-maxime@cerno.tech
Krane-sku0 is similar to krane-sku176 but using a different panel
source.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210113110400.616319-3-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Similar to krane-sku176 but using a different panel source.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210113110400.616319-2-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Config dsi node for mt8183 kukui. Set panel and ports.
Several kukui boards share the same panel property and only compatible
is different. So compatible will be set in board dts for comparison
convenience.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Link: https://lore.kernel.org/r/20210113110400.616319-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Exposed a new QSPI clock to DT on Tegra210 and documents the eMMC SKU of
the Jetson Xavier NX board.
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Merge tag 'tegra-for-5.12-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
dt-bindings: tegra: Changes for v5.12-rc1
Exposed a new QSPI clock to DT on Tegra210 and documents the eMMC SKU of
the Jetson Xavier NX board.
* tag 'tegra-for-5.12-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: arm: tegra: Document Jetson Xavier NX eMMC SKU
Link: https://lore.kernel.org/r/20210129193254.3610492-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes an issue with HDA codec detection by properly wiring up the
power-domain for the HDA controller. This also fixes one of the USB-C
ports on Jetson AGX Xavier and enables support for audio on various
Tegra210, Tegra186 and Tegra194 boards. The Jetson Nano and Jetson TX1
also gain QSPI support.
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Merge tag 'tegra-for-5.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.12-rc1
Fixes an issue with HDA codec detection by properly wiring up the
power-domain for the HDA controller. This also fixes one of the USB-C
ports on Jetson AGX Xavier and enables support for audio on various
Tegra210, Tegra186 and Tegra194 boards. The Jetson Nano and Jetson TX1
also gain QSPI support.
* tag 'tegra-for-5.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Audio graph sound card for Jetson AGX Xavier
arm64: tegra: Audio graph sound card for Jetson TX2
Revert "arm64: tegra: Disable the ACONNECT for Jetson TX2"
arm64: tegra: Add RT5658 device entry
arm64: tegra: Add support for Jetson Xavier NX with eMMC
arm64: tegra: Prepare for supporting the Jetson Xavier NX with eMMC
arm64: tegra: Enable QSPI on Jetson Xavier NX
arm64: tegra: Add QSPI nodes on Tegra194
arm64: tegra: Enable QSPI on Jetson Nano
arm64: tegra: Audio graph sound card for Jetson Nano and TX1
arm64: tegra: Audio graph header for Tegra210
arm64: tegra: Order nodes alphabetically on Tegra210
arm64: tegra: Enable Jetson-Xavier J512 USB host
arm64: tegra: Add XUSB pad controller's "nvidia,pmc" property on Tegra210
arm64: tegra: Add power-domain for Tegra210 HDA
dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM
Link: https://lore.kernel.org/r/20210129193254.3610492-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes the pinmux configuration for the eMMC on the Ouya to fix issues
with certain bootloaders.
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Merge tag 'tegra-for-5.12-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.12-rc1
Fixes the pinmux configuration for the eMMC on the Ouya to fix issues
with certain bootloaders.
* tag 'tegra-for-5.12-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: ouya: Fix eMMC on specific bootloaders
Link: https://lore.kernel.org/r/20210129193254.3610492-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable support for audio-graph based sound card on Jetson AGX Xavier.
Following I/O interfaces are enabled.
* I2S1, I2S2, I2S4 and I2S6
* DMIC3
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Enable support for audio-graph based sound card on Jetson TX2. Based
on the board design following I/O modules are enabled.
* All I2S instances (I2S1 ... I2S6)
* All DSPK instances (DSPK1, DSPK2)
* DMIC1, DMIC2 and DMIC3
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Ouya fails to detect the eMMC module when booted via certain bootloaders.
Fastboot and hard-kexec bootloaders fail while u-boot does not. It was
discovered that the issue manifests if the sdmmc4 alternate configuration
clock pin is input disabled.
Ouya uses sdmmc4 in the primary pin configuration. It is unknown why this
occurs, though it is likely related to other eMMC limitations experienced
on Ouya.
For now, fix it by enabling input on cam_mclk_pcc0.
Fixes: d7195ac5c9 ("ARM: tegra: Add device-tree for Ouya")
Reported-by: Matt Merhar <mattmerhar@protonmail.com>
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Two different SKUs exist for the Jetson Xavier NX module, so document
the compatible strings for both, as well as the developer kits that come
with each of the SKUs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The 'marvell,pwm-offset' property of both GPIO blocks (per CP component)
point to the same counter registers offset. The driver will decide how
to use counters A/B.
This is different from the convention of pwm on earlier Armada series
(370/38x). On those systems the assignment of A/B counters to GPIO
blocks is coded in both DT and the driver. The actual behaviour of the
current driver on Armada 8K/7K is the same as earlier systems.
Add also clock properties for base pwm frequency reference.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
SATA on A3720 SOC can use only comphy2, so move this definition from board
specific DTS file armada-3720-espressobin.dtsi into main A3720 SOC file
armada-37xx.dtsi.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds necessary flags in the device tree
which enable HS400 mode on AP807 MMC controller
on the CN913x-DB board.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds new compatible string to AP807 DTSI to avoid
its SDHCI controller to run in "slow mode" with disabled UHS.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The partition called "u-boot" in reality contains TF-A and U-Boot, and
TF-A is before U-Boot.
Rename this parition to "a53-firmware" to avoid confusion for users,
since they cannot simply build U-Boot from U-Boot repository and flash
the resulting image there. Instead they have to build the firmware with
the sources from the mox-boot-builder repository [1] and flash the
a53-firmware.bin binary there.
[1] https://gitlab.nic.cz/turris/mox-boot-builder
Signed-off-by: Marek Behún <kabel@kernel.org>
Fixes: 7109d817db ("arm64: dts: marvell: add DTS for Turris Mox")
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This includes the following earlier patches that were considered too
late for v5.11 as discussed between Arnd and me on freenode #armlinux
in December:
- More updates to use cpsw switchdev driver
- Enable gta04 PMIC power management
- Updates for dra7 for ECC support, 1.8GHz speed and keep the
ldo0 regulator always on as specified in the data manual
And then we have the new devicetree changes:
- Configure the original Amazon Echo to for audio
- Configure missing thermal interrupt for omap4430
- Configure mapphone devices for passive thermal cooling, and add
1.2GHz mode.
- Correct omap4430 sgx clock rate to use the runtime Android kernel
value, the earlier value was for a lower power operating point
- Drop turbo mode for 1GHz omap3 variants as we now have passive
cooling configured
- Update email address for Javier
- Add new MYIR Tech Limited board support
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Merge tag 'omap-for-v5.12/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for v5.12 merge window
This includes the following earlier patches that were considered too
late for v5.11 as discussed between Arnd and me on freenode #armlinux
in December:
- More updates to use cpsw switchdev driver
- Enable gta04 PMIC power management
- Updates for dra7 for ECC support, 1.8GHz speed and keep the
ldo0 regulator always on as specified in the data manual
And then we have the new devicetree changes:
- Configure the original Amazon Echo to for audio
- Configure missing thermal interrupt for omap4430
- Configure mapphone devices for passive thermal cooling, and add
1.2GHz mode.
- Correct omap4430 sgx clock rate to use the runtime Android kernel
value, the earlier value was for a lower power operating point
- Drop turbo mode for 1GHz omap3 variants as we now have passive
cooling configured
- Update email address for Javier
- Add new MYIR Tech Limited board support
* tag 'omap-for-v5.12/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-myirtech-*: Add DT for AM335X MYIR Tech Limited board
ARM: dts: omap3-igep: Change email address in copyright notice
ARM: dts: omap36xx: Remove turbo mode for 1GHz variants
ARM: dts: omap443x: Correct sgx clock to 307.2MHz as used on motorola vendor kernel
ARM: dts: motorola-mapphone: Add 1.2GHz OPP
ARM: dts: motorola-mapphone: Configure lower temperature passive cooling
ARM: dts: Configure missing thermal interrupt for 4430
ARM: dts: omap3-echo: Add speaker sound card support
ARM: dts: dra71-evm: mark ldo0 regulator as always on
ARM: dts: dra76x: add support for OPP_PLUS
ARM: dts: am574x-idk: add support for EMIF1 ECC
ARM: dts: omap3-gta04: fix twl4030-power settings
ARM: dts: am335x-evm/evmsk/icev2: switch to new cpsw switch drv
ARM: dts: am33xx-l4: add dt node for new cpsw switchdev driver
Link: https://lore.kernel.org/r/pull-1611845066-809577@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Split up the pins for each fan. This is needed in order to control them
Fixes: ced8025b56 ("ARM: dts: armada388-helios4")
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Newer Linksys boards might come with a Winbond W29N02GV which can be
configured in different ways. Make sure we configure it the same way
as the older chips so everything keeps working.
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
- Further cleanups of the hisilicon DTS to align with the dtschema
- Add or update the I2C, pinctrl and reset nodes for Hikey970
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Merge tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon ARM64 DT updates for 5.12
- Further cleanups of the hisilicon DTS to align with the dtschema
- Add or update the I2C, pinctrl and reset nodes for Hikey970
* tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: hi3670.dtsi: add I2C settings
arm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settings
arm64: dts: hisilicon: hi3670.dtsi: add iomcu_rst
arm64: dts: hisilicon: delete unused property smmu-cb-memtype
arm64: dts: hisilicon: avoid irrelevant nodes being mistakenly identified as PHY nodes
arm64: dts: hisilicon: normalize the node name of the localbus
arm64: dts: hisilicon: normalize the node name of the module thermal
arm64: dts: hisilicon: place clock-names "bus" before "core"
arm64: dts: hisilicon: separate each group of data in the property "ranges"
Link: https://lore.kernel.org/r/6013D1C7.90902@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The I2C buses are not declared at the device tree. As this will
be needed by further patches, add them, keeping all in
disabled state. Per-board settings can override it.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
There are several pinctrl settings that are missing at this
DT file.
Also, the entries are out of order.
Add the missing bits, as they'll be required by the DRM driver - and
probably by other drivers not upstreamed yet.
Reorder the entres, adding the missing bits.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This is required in order to support USB.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The "smmu-cb-memtype" is a private property developed by the Hisilicon
driver in the early stage and is not used now. So delete it.
Otherwise, below YAML check warnings are reported:
arch/arm64/boot/dts/hisilicon/hip06-d03.dt.yaml: iommu@a0040000: \
'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm64/boot/dts/hisilicon/hip07-d05.dt.yaml: iommu@a0040000: \
'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Currently, the names of several nodes incorrectly match common PHY
provider schema. And the phy-provider.yaml requires them must have
property "#phy-cells". As a result, false positives similar to the
following are reported:
usb2-phy@120: '#phy-cells' is a required property
Change their names slightly so that they do not match pattern:
"^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Change the node name of the localbus to match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'. This error
is detected by simple-bus.yaml.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
1. Change the node name of the thermal zone to match
'^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', add suffix "-thermal".
2. Change the node name of the trip point to match
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', delete character "@".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Look at the clock-names schema defined in arm,mali-utgard.yaml:
clock-names:
items:
- const: bus
- const: core
The "bus" needs to be placed before the "core".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Do not write the "ranges" of multiple groups of data into a uint32 array,
use <> to separate them. Otherwise, the errors similar to the following
will be reported:
soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not valid under \
any of the given schemas (Possible causes of the failure):
soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not of type 'boolean'
soc: pcie@a0090000:ranges:0: [33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536] is too long
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
usbphyc is a 48Mhz clock provider: the clock can be used as clock source
for USB OTG. Add #clock-cells property to usbphyc node to reflect this
capability.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
vdda1v1 and vdda1v8 supplies are required by USB PLL, not by the PHYs.
Remove them from usbphyc child phy nodes now that they are managed in
usbphyc parent node at SoC level.
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
vdda1v1 and vdda1v8 supplies are required by USB PLL. Add them in usbphyc
node.
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add SDA/SCL pinmux lines for I2C6 on STM32MP1.
This support adds both in default and sleep states.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
