- Further cleanups of the hisilicon DTS to align with the dtschema
- Add or update the I2C, pinctrl and reset nodes for Hikey970
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Merge tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon ARM64 DT updates for 5.12
- Further cleanups of the hisilicon DTS to align with the dtschema
- Add or update the I2C, pinctrl and reset nodes for Hikey970
* tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: hi3670.dtsi: add I2C settings
arm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settings
arm64: dts: hisilicon: hi3670.dtsi: add iomcu_rst
arm64: dts: hisilicon: delete unused property smmu-cb-memtype
arm64: dts: hisilicon: avoid irrelevant nodes being mistakenly identified as PHY nodes
arm64: dts: hisilicon: normalize the node name of the localbus
arm64: dts: hisilicon: normalize the node name of the module thermal
arm64: dts: hisilicon: place clock-names "bus" before "core"
arm64: dts: hisilicon: separate each group of data in the property "ranges"
Link: https://lore.kernel.org/r/6013D1C7.90902@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The I2C buses are not declared at the device tree. As this will
be needed by further patches, add them, keeping all in
disabled state. Per-board settings can override it.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
There are several pinctrl settings that are missing at this
DT file.
Also, the entries are out of order.
Add the missing bits, as they'll be required by the DRM driver - and
probably by other drivers not upstreamed yet.
Reorder the entres, adding the missing bits.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This is required in order to support USB.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The "smmu-cb-memtype" is a private property developed by the Hisilicon
driver in the early stage and is not used now. So delete it.
Otherwise, below YAML check warnings are reported:
arch/arm64/boot/dts/hisilicon/hip06-d03.dt.yaml: iommu@a0040000: \
'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm64/boot/dts/hisilicon/hip07-d05.dt.yaml: iommu@a0040000: \
'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Currently, the names of several nodes incorrectly match common PHY
provider schema. And the phy-provider.yaml requires them must have
property "#phy-cells". As a result, false positives similar to the
following are reported:
usb2-phy@120: '#phy-cells' is a required property
Change their names slightly so that they do not match pattern:
"^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Change the node name of the localbus to match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'. This error
is detected by simple-bus.yaml.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
1. Change the node name of the thermal zone to match
'^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', add suffix "-thermal".
2. Change the node name of the trip point to match
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', delete character "@".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Look at the clock-names schema defined in arm,mali-utgard.yaml:
clock-names:
items:
- const: bus
- const: core
The "bus" needs to be placed before the "core".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Do not write the "ranges" of multiple groups of data into a uint32 array,
use <> to separate them. Otherwise, the errors similar to the following
will be reported:
soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not valid under \
any of the given schemas (Possible causes of the failure):
soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not of type 'boolean'
soc: pcie@a0090000:ranges:0: [33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536] is too long
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
- A new DTS file for the Samsung GT-I9070 (Janice)
- Fix up ADC channel name attributes
- Add charger interrupts
- Add thermistors to the HREF boards
- Remove the non-existing AB8505 HW ADC IRQ
- Push down the VMMCI setting to each board
- Add the die temperature channel to teh AB8505
- Fix up the MMC host names to follow the standard
naming convention
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Merge tag 'ux500-dts-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
Ux500 DTS updates for the v5.12 kernel cycle:
- A new DTS file for the Samsung GT-I9070 (Janice)
- Fix up ADC channel name attributes
- Add charger interrupts
- Add thermistors to the HREF boards
- Remove the non-existing AB8505 HW ADC IRQ
- Push down the VMMCI setting to each board
- Add the die temperature channel to teh AB8505
- Fix up the MMC host names to follow the standard
naming convention
* tag 'ux500-dts-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: Fix up MMC host node names
ARM: dts: ux500: Add die temperature to AB8505
ARM: dts: ux500: Push VMMCI down to each tree
ARM: dts: ux500: Remove the GPADC HW IRQ
ARM: dts: ux500: Add thermistors to the HREF
ARM: dts: ux500: Add interrupts to charger
ARM: dts: ux500: Fix channel names attributes
ARM: dts: ux500: Add a device tree for Janice
Link: https://lore.kernel.org/r/CACRpkdbn=P63V9aEO2wKu2DwvVUcbjwCEV_JvKwWZ0netT75ig@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The standard mandates that these nodes be named
mmc@... not sdi_foo@...
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The BreadBee and the BreadBee Crust are the same PCB with a different
SoC mounted. There are two top level dts to handle this.
To avoid deduplicating the parts that are more related to the PCB than
the SoC (i.e. the voltage regs and LEDs) add a common dtsi that can
be included in both top level dts.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20201224020354.2212037-1-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- removing a property never documented nor used
- adding i2c recovery GPI for one more board
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Merge tag 'at91-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 DT for 5.12:
- removing a property never documented nor used
- adding i2c recovery GPI for one more board
* tag 'at91-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sama5d2: remove atmel,wakeup-type references
ARM: dts: at91-sama5d27_wlsom1: add i2c recovery
Link: https://lore.kernel.org/r/20210122145056.171283-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Document suport for the Beacon EmbeddedWorks RZ/G2N and RZ/H kits.
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Merge tag 'renesas-dt-bindings-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.12
- Document suport for the Beacon EmbeddedWorks RZ/G2N and RZ/H kits.
* tag 'renesas-dt-bindings-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: arm: renesas: Add Beacon RZ/G2N and RZ/G2H boards
Link: https://lore.kernel.org/r/20210115094610.2334058-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add device nodes for the General Purpose Input/Output (GPIO) block on
the Renesas R-Car V3U (r8a779a0) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210114111117.2214281-1-geert+renesas@glider.be
The AB8505 mixed signal ASIC variant has a die temperature
channel that is missing in the AB8500 variant. Add it to
the DTSI.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The setting of VMMCI differs so much between different
boards that we need to handle it on a per-board basis
rather that complicating things by overriding stuff from
the included DTSI:s. Push it down into top-level tree
instead.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the two temperature-monitoring thermistors to the
HREF reference design, defines a thermal zone for the
chassis and sets some reasonable thermal limits.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The different charger nodes in the AB8500 and AB8505
includes was missing the interrupt assignments for the
interrupts necessary to drive the AB8500/AB8505 charging
state machine.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The AB8500/AB8505 is providing ADC channels and do so
using the standard property "io-channel-names" not the
mistakenly singular form "io-channel-name".
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The RZ/G2 series contain the SPI Multi I/O Bus Controller (RPC-IF).
Add the nodes, but make them disabled by default.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20210102115412.3402059-4-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Per the reference manual for the RZ/G Series, 2nd Generation,
the RZ/G2M, RZ/G2N, and RZ/G2H have a bit that can be set to
choose between a crystal oscillator and an external oscillator.
Because only boards that need this should enable it, it's marked
as disabled by default for backwards compatibility with existing
boards.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201228202221.2327468-2-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Beacon EmbeddedWorks is introducing a new kit based on the
RZ/G2H SoC from Renesas.
The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1
cellular radio.
The Baseboard has Ethernet, USB, HDMI, stereo audio in and out,
along with a variety of push buttons and LED's, and support for
a parallel RGB and an LVDS display. It uses the same baseboard
and SOM files as the RZ/G2M and RZ/G2N kits.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201224170502.2254683-8-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Beacon EmbeddedWorks is introducing a new kit based on the
RZ/G2N SoC from Renesas.
The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1
cellular radio.
The Baseboard has Ethernet, USB, HDMI, stereo audio in and out,
along with a variety of push buttons and LED's, and support for
a parallel RGB and an LVDS display. It uses the same baseboard
and SOM as the RZ/G2M.
This SOM has only 2GB of DDR, and beacon-renesom-som.dtsi contains
the base memory node, so an additional memory node isn't necessary.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201224170502.2254683-7-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
In preparation for adding new dev kits, move anything specific to the
RZ/G2M from the SOM-level and baseboard-levels and move them to the
kit-level. This allows the SOM and baseboard to be reused with
other SoC's.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201224170502.2254683-6-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The keys on the baseboard are laid out in an diamond pattern, up, down,
left, right and center. Update the descriptions to make it easier to
read.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201224170502.2254683-4-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
With the newly added configurable clock options, the audio CODEC can
configure the mclk automatically. Add the reference to the versaclock.
Since the devices on I2C5 can communicate at 400KHz, let's also increase
that too
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201224170502.2254683-3-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The SoC was expecting two clock sources with different frequencies.
One to support 44.1KHz and one to support 48KHz. With the newly added
ability to configure the programmable clock, configure both clocks.
Assign the rcar-sound clocks to reference the versaclock instead of
the fixed clock.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201224170502.2254683-2-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
When the board was added, clock drivers were being updated done at
the same time to allow the versaclock driver to properly configure
the modes. Unfortunately, the updates were not applied to the board
files at the time they should have been, so do it now.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201224170502.2254683-1-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The Intel eASIC N5X platform shares the same register map as the Agilex
platform, thus, we can re-use the socfpga_agilex.dtsi as the base
DTSI.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This is to remove similar errors as below:
OF: /.../gpio-port@0: could not find phandle
Commit 7569486d79 ("gpio: dwapb: Add ngpios DT-property support")
explained the reason of above errors well and added the generic
"ngpios" property, let's use it.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
