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1,462,193 commits

Author SHA1 Message Date
Linus Torvalds
8dfce8991b Pin control fixes for the v6.19 series:
- Mark the Meson GPIO controller as sleeping to avoid a
   context splat.
 
 - Fix up the I2S2 and SWR TX group settings in the
   Qualcomm SM8350 LPASS pin controller, and implement the
   proper .get_direction() callback.
 
 - Fix a pin typo in the TG1520 pin controller.
 
 - Fix a group name in the Marvell armada 3710 XB pin
   controller that got mangled in a DT schema rewrite.
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Merge tag 'pinctrl-v6.19-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control fixes from Linus Walleij:

 - Mark the Meson GPIO controller as sleeping to avoid a
   context splat

 - Fix up the I2S2 and SWR TX group settings in the
   Qualcomm SM8350 LPASS pin controller, and implement the
   proper .get_direction() callback

 - Fix a pin typo in the TG1520 pin controller

 - Fix a group name in the Marvell armada 3710 XB pin
   controller that got mangled in a DT schema rewrite

* tag 'pinctrl-v6.19-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  dt-bindings: pinctrl: marvell,armada3710-xb-pinctrl: fix 'usb32_drvvbus0' group name
  pinctrl: lpass-lpi: implement .get_direction() for the GPIO driver
  pinctrl: th1520: Fix typo
  pinctrl: qcom: sm8350-lpass-lpi: Merge with SC7280 to fix I2S2 and SWR TX pins
  pinctrl: meson: mark the GPIO controller as sleeping
2026-01-28 08:03:11 -08:00
Arnd Bergmann
2ba042ca39 i.MX arm64 device tree changes for 6.20:
- New board support: i.MX8MP/i.MX91/i.MX93/i.MX95 FRDM, ifm VHIP4
   EvalBoard, Apalis iMX8QP, TQ-Systems MBLS1028A/MBLS1028A-IND
 - A number of series from Alexander Stein improving lpcg indices
   description for tqma8xxs board, moving BMAN/QMAN buffers for
   tqmls1046a, refreshing tqma8mpql-mba8mpxl support a bit, adding HDMI
   audio support for tqma8mpql-mba8mp-ras314 etc.
 - A series from Chancel Liu adding various audio features for
   imx93-14x14-evk board
 - A series from Francesco Dolcini enabling hdmi_pai device for
   imx8mp-verdin and imx8mp-toradex-smarc
 - A couple of changes from Francesco Valla enabling more devices
   and correcting CAN transceiver gpio for imx93-11x11-frdm
 - A few changes from Frank Li adding DDR perf support for imx8qm, adding
   camera support for imx8mp-evk, enabling thermal support for i.MX91, etc.
 - A series from Haibo Chen adding flexcan support for imx943-evk and
   imx952-evk boards
 - A series from Krzysztof Kozlowski fixing up coding style issues
 - A couple of changes from Marek Vasut updating Data Modul i.MX8M Plus
   eDM SBC DT to rev.903, using GPU_CGC as core clock for GPU on i.MX95
 - A series from Markus Niebel to clean up imx8mm-tqma8mqml board
   regulators
 - A couple of series from Peng Fan replacing xceiver-supply with phys
   for NXP EVK boards, improving imx952-evk board support
 - A series from Sebastian Krzyszkowiak to refresh imx8mq-librem5 support
 - A couple of series from Stefano Radaelli to improve
   imx93-var-som-symphony and imx8mp-var-som support
 - Other random changes for various boards
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Merge tag 'imx-dt64-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt

i.MX arm64 device tree changes for 6.20:

- New board support: i.MX8MP/i.MX91/i.MX93/i.MX95 FRDM, ifm VHIP4
  EvalBoard, Apalis iMX8QP, TQ-Systems MBLS1028A/MBLS1028A-IND
- A number of series from Alexander Stein improving lpcg indices
  description for tqma8xxs board, moving BMAN/QMAN buffers for
  tqmls1046a, refreshing tqma8mpql-mba8mpxl support a bit, adding HDMI
  audio support for tqma8mpql-mba8mp-ras314 etc.
- A series from Chancel Liu adding various audio features for
  imx93-14x14-evk board
- A series from Francesco Dolcini enabling hdmi_pai device for
  imx8mp-verdin and imx8mp-toradex-smarc
- A couple of changes from Francesco Valla enabling more devices
  and correcting CAN transceiver gpio for imx93-11x11-frdm
- A few changes from Frank Li adding DDR perf support for imx8qm, adding
  camera support for imx8mp-evk, enabling thermal support for i.MX91, etc.
- A series from Haibo Chen adding flexcan support for imx943-evk and
  imx952-evk boards
- A series from Krzysztof Kozlowski fixing up coding style issues
- A couple of changes from Marek Vasut updating Data Modul i.MX8M Plus
  eDM SBC DT to rev.903, using GPU_CGC as core clock for GPU on i.MX95
- A series from Markus Niebel to clean up imx8mm-tqma8mqml board
  regulators
- A couple of series from Peng Fan replacing xceiver-supply with phys
  for NXP EVK boards, improving imx952-evk board support
- A series from Sebastian Krzyszkowiak to refresh imx8mq-librem5 support
- A couple of series from Stefano Radaelli to improve
  imx93-var-som-symphony and imx8mp-var-som support
- Other random changes for various boards

* tag 'imx-dt64-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (104 commits)
  arm64: dts: freescale: imx95: Add support for i.MX95 15x15 FRDM board
  arm64: dts: imx91-11x11-frdm: fix CAN transceiver gpio
  arm64: dts: imx93-11x11-frdm: enable additional devices
  arm64: dts: imx93-11x11-frdm: Add MQS audio support
  arm64: dts: imx952-evk: Add nxp,ctrl-ids for scmi misc
  arm64: dts: imx952-evk: Add flexcan support
  arm64: dts: imx952-evk: Enable TPM[3,6]
  arm64: dts: imx952-evk: Enable wdog3
  arm64: dts: imx952-evk: Enable USB[1,2]
  arm64: dts: imx952-evk: Enable SPI7
  arm64: dts: imx952-evk: Enable UART5
  arm64: dts: imx952-evk: Enable I2C[2,3,4,6,7] bus
  arm64: dts: imx952-evk: Change the usdhc1_200mhz drive strength to DSE4
  arm64: dts: imx952: Add idle-states node
  arm64: dts: imx8mn: Add ifm VHIP4 EvalBoard v1 and v2
  arm64: dts: imx8mn: Add SNVS LPGPR
  arm64: dts: imx8mq-librem5: Don't set mic-cfg for wm8962
  arm64: dts: imx8mq-librem5: Set cap-power-off-card for usdhc2
  arm64: dts: imx8mq-librem5: Limit uSDHC2 frequency to 50MHz
  arm64: dts: imx8mq-librem5: Enable SNVS RTC
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-28 17:00:58 +01:00
Arnd Bergmann
33dc81740d i.MX dt-bindgings changes for 6.20:
- New board compatibles for i.MX93 11x11 FRDM, Apalis iMX8QP, i.MX91 FRDM,
   ifm VHIP4 EvalBoard v1 and v2, TQ-Systems MBLS1028A/MBLS1028A-IND,
   i.MX952 EVK, i.MX8MP FRDM
 - Add vendor prefix for ifm electronic gmbh
 - A couple of small changes for fsl,imx-gpc.yaml and tcg,tpm-tis-i2c.yaml
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Merge tag 'imx-bindings-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt

i.MX dt-bindgings changes for 6.20:

- New board compatibles for i.MX93 11x11 FRDM, Apalis iMX8QP, i.MX91 FRDM,
  ifm VHIP4 EvalBoard v1 and v2, TQ-Systems MBLS1028A/MBLS1028A-IND,
  i.MX952 EVK, i.MX8MP FRDM
- Add vendor prefix for ifm electronic gmbh
- A couple of small changes for fsl,imx-gpc.yaml and tcg,tpm-tis-i2c.yaml

* tag 'imx-bindings-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: arm: fsl: Add compatible for i.MX95 15x15 FRDM board
  dt-bindings: arm: fsl: Document ifm VHIP4 EvalBoard v1 and v2
  dt-bindings: vendor-prefixes: Document ifm electronic gmbh
  dt-bindings: arm: fsl: Add FRDM-IMX91 board
  dt-bindings: tpm: Add st,st33tphf2ei2c
  dt-bindings: arm: fsl: Add Apalis iMX8QP
  dt-bindings: arm: fsl: add i.MX952 EVK board
  dt-bindings: arm: fsl: add i.MX93 11x11 FRDM board
  dt-bindings: power: fsl,imx-gpc: Document address-cells
  dt-bindings: arm: fsl: Add i.MX8MP FRDM board
  dt-bindings: arm: fsl: add TQ-Systems boards MBLS1028A and MBLS1028A-IND

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-28 17:00:13 +01:00
Arnd Bergmann
1daa947cb2 dt-bindings: Changes for v6.20-rc1
This series updates various DT bindings for Tegra architecture,
 primarily focusing on schema validation fixes and new feature
 documentation for Tegra234 and Tegra264 SoCs. Key changes include
 converting Tegra20 NAND bindings to YAML, and updating memory, DMA, and
 IOMMU definitions for Tegra264 (introducing CMDQV and DBB clock
 support). Additionally, it resolves legacy warnings for Tegra30/132
 display and VI interfaces.
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Merge tag 'tegra-for-6.20-dt-bindings-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

dt-bindings: Changes for v6.20-rc1

This series updates various DT bindings for Tegra architecture,
primarily focusing on schema validation fixes and new feature
documentation for Tegra234 and Tegra264 SoCs. Key changes include
converting Tegra20 NAND bindings to YAML, and updating memory, DMA, and
IOMMU definitions for Tegra264 (introducing CMDQV and DBB clock
support). Additionally, it resolves legacy warnings for Tegra30/132
display and VI interfaces.

* tag 'tegra-for-6.20-dt-bindings-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: display: tegra: document Tegra30 VI and VIP
  dt-bindings: display: tegra: document Tegra132 MIPI calibration device
  dt-bindings: mtd: nvidia,tegra20-nand: convert to DT schema
  dt-bindings: dma: Update ADMA bindings for tegra264
  dt-bindings: iommu: Add NVIDIA Tegra CMDQV support
  dt-bindings: memory: tegra: Document DBB clock for Tegra264
  dt-bindings: tegra: pmc: Update aotag as an optional aperture
2026-01-28 16:56:11 +01:00
Beata Michalska
c71257394b rust: dma: allow drivers to tune max segment size
Make dma_set_max_seg_size() available to Rust so drivers can perform
standard DMA setup steps.

Signed-off-by: Beata Michalska <beata.michalska@arm.com>
Acked-by: Robin Murphy <robvin.murphy@arm.com>
Reviewed-by: Alice Ryhl <aliceryhl@google.com>
Link: https://patch.msgid.link/20260128135320.689046-1-beata.michalska@arm.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-01-28 16:53:24 +01:00
Marek Vasut
7ae4d097b7
spi: spi-fsl-lpspi: Handle clock polarity and phase
The LPSPI driver currently does not support setting SPI bus clock
polarity and phase, add support for it.

It is important to configure correct initial clock polarity and phase
before the GPIO chipselect toggles, otherwise a chip attached to the
bus might recognize the first change of clock signal as the first
clock cycle and get confused.

In order to set up the correct polarity and phase on the clock signal
before the GPIO chipselects get configured by the SPI core, the
controller has to be briefly brought up in fsl_lpspi_prepare_message().
The fsl_lpspi_prepare_message() behaves like a zero-length transfer
which always uses PIO and never DMA, and which leaves the clock signal
in the correct state at the end of such transfer, which happens before
the GPIO chipselect toggles.

Signed-off-by: Marek Vasut <marex@nabladev.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260127222353.1452003-1-marex@nabladev.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2026-01-28 15:53:10 +00:00
Chuck Lever
3daab3112f nfsd: cancel async COPY operations when admin revokes filesystem state
Async COPY operations hold copy stateids that represent NFSv4 state.
Thus, when the NFS server administrator revokes all NFSv4 state for
a filesystem via the unlock_fs interface, ongoing async COPY
operations referencing that filesystem must also be canceled.

Each cancelled copy triggers a CB_OFFLOAD callback carrying the
NFS4ERR_ADMIN_REVOKED status to notify the client that the server
terminated the operation.

The static drop_client() function is renamed to nfsd4_put_client()
and exported. The function must be exported because both the new
nfsd4_cancel_copy_by_sb() and the CB_OFFLOAD release callback in
nfs4proc.c need to release client references.

Reviewed-by: NeilBrown <neil@brown.name>
Reviewed-by: Jeff Layton <jlayton@kernel.org>
Signed-off-by: Chuck Lever <chuck.lever@oracle.com>
2026-01-28 10:15:42 -05:00
Jeff Layton
d8316b837c nfsd: add controls to set the minimum number of threads per pool
Add a new "min_threads" variable to the nfsd_net, along with the
corresponding netlink interface, to set that value from userland.
Pass that value to svc_set_pool_threads() and svc_set_num_threads().

Signed-off-by: Jeff Layton <jlayton@kernel.org>
Signed-off-by: Chuck Lever <chuck.lever@oracle.com>
2026-01-28 10:15:42 -05:00
Jeff Layton
1c87a0c39a nfsd: adjust number of running nfsd threads based on activity
nfsd() is changed to pass a timeout to svc_recv() when there is a min
number of threads set, and to handle error returns from it:

In the case of -ETIMEDOUT, if the service mutex can be taken (via
trylock), the thread becomes an RQ_VICTIM so that it will exit,
providing that the actual number of threads is above pool->sp_nrthrmin.

In the case of -EBUSY, if the actual number of threads is below
pool->sp_nrthrmax, it will attempt to start a new thread. This attempt
is gated on a new SP_TASK_STARTING pool flag that serializes thread
creation attempts within a pool, and further by mutex_trylock().

Neil says: "I think we want memory pressure to be able to push a thread
into returning -ETIMEDOUT.  That can come later."

Signed-off-by: NeilBrown <neil@brown.name>
Signed-off-by: Jeff Layton <jlayton@kernel.org>
Signed-off-by: Chuck Lever <chuck.lever@oracle.com>
2026-01-28 10:15:42 -05:00
Jeff Layton
a0022a38be sunrpc: allow svc_recv() to return -ETIMEDOUT and -EBUSY
To dynamically adjust the thread count, nfsd requires some information
about how busy things are.

Change svc_recv() to take a timeout value, and then allow the wait for
work to time out if it's set. If a timeout is not defined, then the
schedule will be set to MAX_SCHEDULE_TIMEOUT. If the task waits for the
full timeout, then have it return -ETIMEDOUT to the caller.

If it wakes up, finds that there is more work and that no threads are
available, then attempt to set SP_TASK_STARTING. If wasn't already set,
have the task return -EBUSY to cue to the caller that the service could
use more threads.

Signed-off-by: Jeff Layton <jlayton@kernel.org>
Signed-off-by: Chuck Lever <chuck.lever@oracle.com>
2026-01-28 10:15:42 -05:00
Jeff Layton
7f221b340d sunrpc: split new thread creation into a separate function
Break out the part of svc_start_kthreads() that creates a thread into
svc_new_thread(), as a new exported helper function.

Signed-off-by: Jeff Layton <jlayton@kernel.org>
Signed-off-by: Chuck Lever <chuck.lever@oracle.com>
2026-01-28 10:15:42 -05:00
Jeff Layton
7ffc7ade2c sunrpc: introduce the concept of a minimum number of threads per pool
Add a new pool->sp_nrthrmin field to track the minimum number of threads
in a pool. Add min_threads parameters to both svc_set_num_threads() and
svc_set_pool_threads(). If min_threads is non-zero and less than the
max, svc_set_num_threads() will ensure that the number of running
threads is between the min and the max.

If the min is 0 or greater than the max, then it is ignored, and the
maximum number of threads will be started, and never spun down.

For now, the min_threads is always 0, but a later patch will pass the
proper value through from nfsd.

Signed-off-by: Jeff Layton <jlayton@kernel.org>
Signed-off-by: Chuck Lever <chuck.lever@oracle.com>
2026-01-28 10:15:42 -05:00
Jeff Layton
6cd60f4274 sunrpc: track the max number of requested threads in a pool
The kernel currently tracks the number of threads running in a pool in
the "sp_nrthreads" field. In the future, where threads are dynamically
spun up and down, it'll be necessary to keep track of the maximum number
of requested threads separately from the actual number running.

Add a pool->sp_nrthrmax parameter to track this. When userland changes
the number of threads in a pool, update that value accordingly.

Signed-off-by: Jeff Layton <jlayton@kernel.org>
Signed-off-by: Chuck Lever <chuck.lever@oracle.com>
2026-01-28 10:15:42 -05:00
Jeff Layton
2c01f0cf32 sunrpc: remove special handling of NULL pool from svc_start/stop_kthreads()
Now that svc_set_num_threads() handles distributing the threads among
the available pools, remove the special handling of a NULL pool pointer
from svc_start_kthreads() and svc_stop_kthreads().

Signed-off-by: Jeff Layton <jlayton@kernel.org>
Signed-off-by: Chuck Lever <chuck.lever@oracle.com>
2026-01-28 10:15:42 -05:00
Jeff Layton
e344f87262 sunrpc: split svc_set_num_threads() into two functions
svc_set_num_threads() will set the number of running threads for a given
pool. If the pool argument is set to NULL however, it will distribute
the threads among all of the pools evenly.

These divergent codepaths complicate the move to dynamic threading.
Simplify the API by splitting these two cases into different helpers:

Add a new svc_set_pool_threads() function that sets the number of
threads in a single, given pool. Modify svc_set_num_threads() to
distribute the threads evenly between all of the pools and then call
svc_set_pool_threads() for each.

Signed-off-by: Jeff Layton <jlayton@kernel.org>
Signed-off-by: Chuck Lever <chuck.lever@oracle.com>
2026-01-28 10:15:42 -05:00
Christian Marangi
f2090ebdb5 soc: qcom: smem: fix qcom_smem_is_available and check if __smem is valid
Commit 7a94d5f31b ("soc: qcom: smem: better track SMEM uninitialized
state") changed the usage of __smem and init now as an error pointer
instead of NULL.

qcom_smem_is_available() wasn't updated to reflect this change and also
.qcom_smem_remove doesn't reset it on module exit.

Update both entry to reflect new handling of __smem.

Fixes: 7a94d5f31b ("soc: qcom: smem: better track SMEM uninitialized state")
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/all/aSAnR3ECa04CoPqp@stanley.mountain/
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251122185002.26524-1-ansuelsmth@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-28 09:10:53 -06:00
John Garry
ac30cd3043 nvme: stop using AWUPF
As described at [0], much of the atomic write parts of the specification
are lacking.

For now, there is nothing which we can do in software about the lack of
a dedicated NVMe write atomic command.

As for reading the atomic write limits, it is felt that the per-namespace
values are mostly properly specified and it is assumed that they are
properly implemented.

The specification of NAWUPF is quite clear. However the specification of
NABSPF is less clear. The lack of clarity in NABSPF comes from deciding
whether NABSPF applies when NSABP is 0 - it is assumed that NSABPF does
not apply when NSABP is 0.

As for the per-controller AWUPF, how this value applies to shared
namespaces is missing in the specification. Furthermore, the value is in
terms of logical blocks, which is an NS entity.

Since AWUPF is so poorly defined, stop using it already together.
Hopefully this will force vendors to implement NAWUPF support always.

Note that AWUPF not only effects atomic write support, but also the
physical block size reported for the device.

To help users know this restriction, log an info message per NS.

[0] https://lore.kernel.org/linux-nvme/20250707141834.GA30198@lst.de/

Tested-by: Nilay Shroff <nilay@linux.ibm.com>
Reviewed-by: Nilay Shroff <nilay@linux.ibm.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: John Garry <john.g.garry@oracle.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2026-01-28 07:02:38 -08:00
Roger Pau Monne
a54afbc8a2 nvme-pci: DMA unmap the correct regions in nvme_free_sgls
The call to nvme_free_sgls() in nvme_unmap_data() has the sg_list and sge
parameters swapped.  This wasn't noticed by the compiler because both share
the same type.  On a Xen PV hardware domain, and possibly any other
architectures that takes that path, this leads to corruption of the NVMe
contents.

Fixes: f0887e2a52 ("nvme-pci: create common sgl unmapping helper")
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2026-01-28 06:58:10 -08:00
Benjamin Marzinski
218b16992a dm mpath: make pg_init_delay_msecs settable
"pg_init_delay_msecs X" can be passed as a feature in the multipath
table and is used to set m->pg_init_delay_msecs in parse_features().
However, alloc_multipath_stage2(), which is called after
parse_features(), resets m->pg_init_delay_msecs to its default value.
Instead, set m->pg_init_delay_msecs in alloc_multipath(), which is
called before parse_features(), to avoid overwriting a value passed in
by the table.

Signed-off-by: Benjamin Marzinski <bmarzins@redhat.com>
Cc: stable@vger.kernel.org
2026-01-28 15:45:34 +01:00
Benjamin Marzinski
4550a71b17 Revert "dm: fix a race condition in retrieve_deps"
This reverts commit f6007dce0c.

Commit f6007dce0c ("dm: fix a race condition in retrieve_deps") was
added to fix a race between retrieving the list of dm table devices and
multipath_message() modifying the list of table devices. But Commit
a48f6b82c5 ("dm mpath: don't call dm_get_device in multipath_message")
removed the call to dm_get_device() from multipath_message(). After that
commit, the only calls to dm_get_device() and dm_put_device() are in
target constructors and destructors, so the race with retrieve_deps() is
no longer possible.

Suggested-by: Martin Wilck <mwilck@suse.com>
Signed-off-by: Benjamin Marzinski <bmarzins@redhat.com>
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
2026-01-28 15:44:02 +01:00
Benjamin Marzinski
787bd63ee6 dm mpath: Add missing dm_put_device when failing to get scsi dh name
When commit fd81bc5cca ("scsi: device_handler: Return error pointer in
scsi_dh_attached_handler_name()") added code to fail parsing the path if
scsi_dh_attached_handler_name() failed with -ENOMEM, it didn't clean up
the reference to the path device that had just been taken. Fix this, and
steamline the error paths of parse_path() a little.

Fixes: fd81bc5cca ("scsi: device_handler: Return error pointer in scsi_dh_attached_handler_name()")
Cc: stable@vger.kernel.org
Signed-off-by: Benjamin Marzinski <bmarzins@redhat.com>
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
2026-01-28 15:43:34 +01:00
Andy Shevchenko
e64d1cb21a gpiolib: acpi: Fix potential out-of-boundary left shift
GPIO Address Space handler gets a pointer to the in or out value.
This value is supposed to be at least 64-bit, but it's not limited
to be exactly 64-bit. When ACPI tables are being parsed, for
the bigger Connection():s ACPICA creates a Buffer instead of regular
Integer object. The Buffer exists as long as Namespace holds
the certain Connection(). Hence we can access the necessary bits
without worrying. On the other hand, the left shift, used in
the code, is limited by 31 (on 32-bit platforms) and otherwise
considered to be Undefined Behaviour. Also the code uses only
the first 64-bit word for the value, and anything bigger than 63
will be also subject to UB. Fix all this by modifying the code
to correctly set or clear the respective bit in the bitmap constructed
of 64-bit words.

Fixes: 59084c564c41 ("gpiolib: acpi: use BIT_ULL() for u64 mask in address space handler")
Fixes: 2c4d00cb8f ("gpiolib: acpi: Use BIT() macro to increase readability")
Cc: stable@vger.kernel.org
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://patch.msgid.link/20260128095918.4157491-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2026-01-28 15:24:09 +01:00
Jason Gunthorpe
5815d9303c iommupt: Only cache flush memory changed by unmap
The cache flush was happening on every level across the whole range of
iteration, even if no leafs or tables were cleared. Instead flush only the
sub range that was actually written.

Overflushing isn't a correctness problem but it does impact the
performance of unmap.

After this series the performance compared to the original VT-d
implementation with cache flushing turned on is:

map_pages
   pgsz  ,avg new,old ns, min new,old ns  , min % (+ve is better)
     2^12,    253,266   ,     213,227     ,   6.06
     2^21,    246,244   ,     221,219     ,   0.00
     2^30,    231,240   ,     209,217     ,   3.03
 256*2^12,   2604,2668  ,    2415,2540    ,   4.04
 256*2^21,   2495,2824  ,    2390,2734    ,  12.12
 256*2^30,   2542,2845  ,    2380,2718    ,  12.12

unmap_pages
   pgsz  ,avg new,old ns, min new,old ns  , min % (+ve is better)
     2^12,    259,292   ,     222,251     ,  11.11
     2^21,    255,259   ,     227,236     ,   3.03
     2^30,    238,254   ,     217,230     ,   5.05
 256*2^12,   2751,2620  ,    2417,2437    ,   0.00
 256*2^21,   2461,2526  ,    2377,2423    ,   1.01
 256*2^30,   2498,2543  ,    2370,2404    ,   1.01

Fixes: efa03dab7c ("iommupt: Flush the CPU cache after any writes to the page table")
Reported-by: Francois Dugast <francois.dugast@intel.com>
Closes: https://lore.kernel.org/all/20260121130233.257428-1-francois.dugast@intel.com/
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>
Tested-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2026-01-28 15:14:17 +01:00
Nathan Chancellor
5b0530bb16 iommu/amd: Fix type of type parameter to amd_iommufd_hw_info()
When building with -Wincompatible-function-pointer-types-strict, a
warning designed to catch kernel control flow integrity (kCFI) issues at
build time, there is an instance around amd_iommufd_hw_info():

  drivers/iommu/amd/iommu.c:3141:13: error: incompatible function pointer types initializing 'void *(*)(struct device *, u32 *, enum iommu_hw_info_type *)' (aka 'void *(*)(struct device *, unsigned int *, enum iommu_hw_info_type *)') with an expression of type 'void *(struct device *, u32 *, u32 *)' (aka 'void *(struct device *, unsigned int *, unsigned int *)') [-Werror,-Wincompatible-function-pointer-types-strict]
   3141 |         .hw_info = amd_iommufd_hw_info,
        |                    ^~~~~~~~~~~~~~~~~~~

While 'u32 *' and 'enum iommu_hw_info_type *' are ABI compatible, hence
no regular warning from -Wincompatible-function-pointer-types, the
mismatch will trigger a kCFI violation when amd_iommufd_hw_info() is
called indirectly.

Update the type parameter of amd_iommufd_hw_info() to be
'enum iommu_hw_info_type *' to match the prototype in
'struct iommu_ops', clearing up the warning and kCFI violation.

Fixes: 7d8b06ecc4 ("iommu/amd: Add support for hw_info for iommu capability query")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2026-01-28 15:13:01 +01:00
Koichiro Den
c0f1506f63 PCI: dwc: Advertise dynamic inbound mapping support
The DesignWare EP core has supported updating the inbound iATU mapping
for an already configured BAR (i.e. allowing pci_epc_set_bar() to be
called again without a prior pci_epc_clear_bar()) since
commit 4284c88fff ("PCI: designware-ep: Allow pci_epc_set_bar() update
inbound map address").

Now that this capability is exposed via the dynamic_inbound_mapping EPC
feature bit, set it for DWC-based EP glue drivers using a common
initializer macro to avoid duplicating the same flag in each driver.

Note that pci-layerscape-ep.c is untouched. It currently constructs the
feature struct dynamically in ls_pcie_ep_init(). Once converted to a
static feature definition, it will use DWC_EPC_COMMON_FEATURES as well.

Signed-off-by: Koichiro Den <den@valinux.co.jp>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Niklas Cassel <cassel@kernel.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260124145012.2794108-4-den@valinux.co.jp
2026-01-28 19:16:06 +05:30
Koichiro Den
31fb954004 PCI: endpoint: Add BAR subrange mapping support
Some endpoint platforms have only a small number of usable BARs. At the
same time, EPF drivers (e.g. vNTB) may need multiple independent inbound
regions (control/scratchpad, one or more memory windows, and optionally
MSI or other feature-related regions). Subrange mapping allows these to
share a single BAR without consuming additional BARs that may not be
available, or forcing a fragile layout by aggressively packing into a
single contiguous memory range.

Extend the PCI endpoint core to support mapping subranges within a BAR.
Add an optional 'submap' field in struct pci_epf_bar so an endpoint
function driver can request inbound mappings that fully cover the BAR.

Introduce a new EPC feature bit, subrange_mapping, and reject submap
requests from pci_epc_set_bar() unless the controller advertises both
subrange_mapping and dynamic_inbound_mapping features.

The submap array describes the complete BAR layout (no overlaps and no
gaps are allowed to avoid exposing untranslated address ranges). This
provides the generic infrastructure needed to map multiple logical
regions into a single BAR at different offsets, without assuming a
controller-specific inbound address translation mechanism.

Signed-off-by: Koichiro Den <den@valinux.co.jp>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Niklas Cassel <cassel@kernel.org>
Link: https://patch.msgid.link/20260124145012.2794108-3-den@valinux.co.jp
2026-01-28 19:15:58 +05:30
Koichiro Den
06a81c5940 PCI: endpoint: Add dynamic_inbound_mapping EPC feature
Introduce a new EPC feature bit (dynamic_inbound_mapping) that indicates
whether an Endpoint Controller can update the inbound address
translation for a BAR without requiring the EPF driver to clear/reset
the BAR first.

Endpoint Function drivers (e.g. vNTB) can use this information to decide
whether it really is safe to call pci_epc_set_bar() multiple times to
update inbound mappings for the BAR.

Suggested-by: Niklas Cassel <cassel@kernel.org>
Signed-off-by: Koichiro Den <den@valinux.co.jp>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Niklas Cassel <cassel@kernel.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260124145012.2794108-2-den@valinux.co.jp
2026-01-28 19:15:48 +05:30
Andy Shevchenko
8e03e6ecc2 pinctrl: tangier: Join tng_pinctrl_probe() into its wrapper
There is no clear sign why we have tng_pinctrl_probe() in the first
place when it has already been using managed calls. Join the function
into its devm_tng_pinctrl_probe() wrapper.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2026-01-28 14:32:23 +01:00
Andy Shevchenko
ae15231c49 pinctrl: tangier: Remove duplicate error messages
The pin control core is covered to report any error via message.
Since that it's not needed in the callers.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2026-01-28 14:32:23 +01:00
Andy Shevchenko
8a924c6bd0 pinctrl: lynxpoint: Remove duplicate error messages
The pin control core is covered to report any error via message.
Since that it's not needed in the callers.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2026-01-28 14:26:48 +01:00
Andy Shevchenko
04c15be548 pinctrl: cherryview: Remove duplicate error messages
The pin control core is covered to report any error via message.
Since that it's not needed in the callers.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2026-01-28 14:26:45 +01:00
Andy Shevchenko
bcdcd19e25 pinctrl: baytrail: Remove duplicate error messages
The pin control core is covered to report any error via message.
Since that it's not needed in the callers.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2026-01-28 14:26:31 +01:00
Andy Shevchenko
a887bcb4dc pinctrl: intel: Remove duplicate error messages
The pin control core is covered to report any error via message.
Since that it's not needed in the callers.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2026-01-28 14:26:27 +01:00
Mark Brown
b661d753ce kselftest/arm64: Raise default number of loops in fp-pidbench
When fp-pidbench was originally written SVE hardware was not widely
available so it was useful to run it in emulation and the default number
of loops was set very low, running for less than a second on actual
hardware. Now that SVE hardware is reasonably available it is very much
less interesting to use emulation, bump the default number of loops up to
even out a bit of the noise on real systems. On the machine I have to hand
this now takes about 15s which is still a toy microbenchmark but perhaps a
bit more useful.

Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
2026-01-28 13:09:30 +00:00
Mark Brown
96e004b4bd kselftest/arm64: Add a no-SVE loop after SVE in fp-pidbench
Some applications use SVE intermittently, one common case being where SVE
is used during statup (eg, by ld.so) but then rarely if ever during the
main application runtime. Add a repeat of the no SVE loop after we've done
the SVE loops to fp-pidbench to capture results for that.

Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
2026-01-28 13:09:30 +00:00
Sebastian Andrzej Siewior
ab26d9c855 perf/cxlpmu: Replace IRQF_ONESHOT with IRQF_NO_THREAD
Passing IRQF_ONESHOT ensures that the interrupt source is masked until
the secondary (threaded) handler is done. If only a primary handler is
used then the flag makes no sense because the interrupt can not fire
(again) while its handler is running.
The flag also disallows force-threading of the primary handler and the
irq-core will warn about this.

The intention here was probably not allowing forced-threading.

Replace IRQF_ONESHOT with IRQF_NO_THREAD.

Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Will Deacon <will@kernel.org>
2026-01-28 13:06:03 +00:00
Krishna Chomal
eeeb4c9874
platform/x86: hp-wmi: Add EC offsets to read Victus S thermal profile
The current implementation for Victus S thermal profiles only supports
setting the profile. The driver was missing the logic to read the
hardware state, meaning it would default to "Balanced" on driver load,
overriding the currently active profile. Furthermore, the driver could
not detect if the firmware reset the profile on a power source change.

Statically store the known EC offsets for reading thermal profile in the
new .ec_tp_offset field of struct thermal_profile_params. Implement
platform_profile_victus_s_get_ec() to use this offset to read the real
hardware state. Additionally, update the power source event notifier to
use the actual hardware state when re-triggering CPU power limits
actualization.

Testing on HP Omen 16-wf1xxx (board ID 8C78) confirmed that the thermal
profile is now persistent across driver loads and power source change
events.

Signed-off-by: Krishna Chomal <krishna.chomal108@gmail.com>
Link: https://patch.msgid.link/20260121182858.66363-1-krishna.chomal108@gmail.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-01-28 15:05:59 +02:00
Rafael J. Wysocki
fe747d7112
platform/x86: classmate-laptop: Add missing NULL pointer checks
In a few places in the Classmate laptop driver, code using the accel
object may run before that object's address is stored in the driver
data of the input device using it.

For example, cmpc_accel_sensitivity_store_v4() is the "show" method
of cmpc_accel_sensitivity_attr_v4 which is added in cmpc_accel_add_v4(),
before calling dev_set_drvdata() for inputdev->dev.  If the sysfs
attribute is accessed prematurely, the dev_get_drvdata(&inputdev->dev)
call in in cmpc_accel_sensitivity_store_v4() returns NULL which
leads to a NULL pointer dereference going forward.

Moreover, sysfs attributes using the input device are added before
initializing that device by cmpc_add_acpi_notify_device() and if one
of them is accessed before running that function, a NULL pointer
dereference will occur.

For example, cmpc_accel_sensitivity_attr_v4 is added before calling
cmpc_add_acpi_notify_device() and if it is read prematurely, the
dev_get_drvdata(&acpi->dev) call in cmpc_accel_sensitivity_show_v4()
returns NULL which leads to a NULL pointer dereference going forward.

Fix this by adding NULL pointer checks in all of the relevant places.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Link: https://patch.msgid.link/12825381.O9o76ZdvQC@rafael.j.wysocki
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-01-28 14:57:26 +02:00
Miguel Ojeda
a7c013f779 Merge patch series "refactor Rust proc macros with syn"
Gary writes:

  "This series converts Rust proc macros that we have to use `syn`,
   and replace the custom `quote!` macro that we have with the vendored
   `quote!` macro. The `pin-init` macros are not converted yet; Benno
   has a work in progress in converting them. They're however converted
   to use `quote` and `proc-macro2` crate so our custom `quote!` macro
   can be removed.

   Overall this improves the robustness of the macros as we have precise
   parsing of the AST rather than relying on heuristics to extract needed
   information from there. This is also a quality-of-life improvement
   to those using language servers (e.g. Rust analyzer) as the span
   information of the proc macros are now preserved which allows the
   "jump-to-definition" feature to work, even when used on completely
   custom macros such as `module!`.

   Miguel gave a very good explanation on why `syn` is a good idea in the
   patch series that introduced it [1], which I shall not repeat here."

The `pin-init` rewrite was merged just before this one.

Link: https://lore.kernel.org/rust-for-linux/20251124151837.2184382-1-ojeda@kernel.org/ [1]
Link: https://patch.msgid.link/20260112170919.1888584-1-gary@kernel.org
Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2026-01-28 13:44:42 +01:00
Gary Guo
779f6e3e1c rust: macros: support #[cfg] properly in #[vtable] macro.
Currently, we generate `HAS_` constants as long as the definition exists in
the source, regardless if it is cfg-ed out or not.

Currently, uses of `#[cfg]` present in both trait and impl, so it is not a
problem; however if only the impl side uses `#[cfg]` then `HAS_` constants
will incorrectly be true while it shouldnt't.

With `syn` support, we can now implement `#[cfg]` handling properly by
propagating the `#[cfg]` attributes to the constants.

Signed-off-by: Gary Guo <gary@garyguo.net>
Reviewed-by: Benno Lossin <lossin@kernel.org>
Link: https://patch.msgid.link/20260113170529.2240744-1-gary@kernel.org
Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2026-01-28 13:44:17 +01:00
Gary Guo
be97f3c820 rust: kunit: use pin_init::zeroed instead of custom null value
The last null element can be created (constly) using `pin_init::zeroed`,
so prefer to use it instead of adding a custom way of building it.

Reviewed-by: Tamir Duberstein <tamird@gmail.com>
Reviewed-by: Benno Lossin <lossin@kernel.org>
Signed-off-by: Gary Guo <gary@garyguo.net>
Reviewed-by: David Gow <davidgow@google.com>
Link: https://patch.msgid.link/20260112170919.1888584-12-gary@kernel.org
Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2026-01-28 13:44:17 +01:00
Gary Guo
d421fa4f73 rust: macros: rearrange #[doc(hidden)] in module! macro
This `#[doc(hidden)]` can just be applied on a module to hide anything
within.

Reviewed-by: Tamir Duberstein <tamird@gmail.com>
Reviewed-by: Benno Lossin <lossin@kernel.org>
Signed-off-by: Gary Guo <gary@garyguo.net>
Link: https://patch.msgid.link/20260112170919.1888584-11-gary@kernel.org
Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2026-01-28 13:44:17 +01:00
Gary Guo
3d5731a6be rust: macros: allow arbitrary types to be used in module! macro
Previously this only accepts an identifier, but now with `syn` it is
easy to make it accepts any type.

Reviewed-by: Benno Lossin <lossin@kernel.org>
Signed-off-by: Gary Guo <gary@garyguo.net>
Link: https://patch.msgid.link/20260112170919.1888584-10-gary@kernel.org
Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2026-01-28 13:44:17 +01:00
Gary Guo
c3b416e19e rust: macros: convert #[kunit_tests] macro to use syn
Make use of `syn` to parse the module structurally and thus improve the
robustness of parsing.

String interpolation is avoided by generating tokens directly using
`quote!`.

Reviewed-by: Tamir Duberstein <tamird@gmail.com>
Signed-off-by: Gary Guo <gary@garyguo.net>
Reviewed-by: Benno Lossin <lossin@kernel.org>
Reviewed-by: David Gow <davidgow@google.com>
Link: https://patch.msgid.link/20260112170919.1888584-9-gary@kernel.org
[ Pass C string to match commit 6c37b6841a ("rust: kunit: replace
  `kernel::c_str!` with C-Strings"). - Miguel ]
Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2026-01-28 13:43:36 +01:00
Oleksandr Shamray
059417ea91
platform: mellanox: mlx-platform: Add support DGX flavor of next-generation 800GB/s ethernet switch.
This system is based on Nvidia SN5600 Spectrum-4 Based 64x800Gb/s ETH
Switch System, with the following key changes:

Key changes:
  1. New system SKU: HI174.
  2. Power Supply: PSU AC replaiced with PDB board (added pdb/pwr
     attributes).
  3. CPLD: Update register map with new PDB related signals.

Signed-off-by: Oleksandr Shamray <oleksandrs@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
Link: https://patch.msgid.link/20260128075939.2704019-3-oleksandrs@nvidia.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-01-28 14:38:21 +02:00
Oleksandr Shamray
dbf76f8658
platform: mellanox: mlx-platform: Add support for new Nvidia DGX system based on class VMOD0010
This system is based on Nvidia QM9700 64x400G QTM-2 switch, with the
following key changes:

Key changes:
  1. New system SKU: HI73.
  2. Power Supply: PSU AC replaiced with PDB board (added pdb/pwr
     attributes).
  3. CPLD: Update register map with new PDB related signals.

Signed-off-by: Oleksandr Shamray <oleksandrs@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
Link: https://patch.msgid.link/20260128075939.2704019-2-oleksandrs@nvidia.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-01-28 14:38:18 +02:00
Haoxiang Li
52f527d091 bus: fsl-mc: fix an error handling in fsl_mc_device_add()
In fsl_mc_device_add(), device_initialize() is called first.
put_device() should be called to drop the reference if error
occurs. And other resources would be released via put_device
-> fsl_mc_device_release. So remove redundant kfree() in
error handling path.

Fixes: bbf9d17d98 ("staging: fsl-mc: Freescale Management Complex (fsl-mc) bus driver")
Cc: stable@vger.kernel.org
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/all/b767348e-d89c-416e-acea-1ebbff3bea20@stanley.mountain/
Signed-off-by: Su Hui <suhui@nfschina.com>
Suggested-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
Signed-off-by: Haoxiang Li <lihaoxiang@isrc.iscas.ac.cn>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Link: https://lore.kernel.org/r/20260124102054.1613093-1-lihaoxiang@isrc.iscas.ac.cn
Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-01-28 13:35:48 +01:00
Thorsten Blum
f46ebb9109 block: Replace snprintf with strscpy in check_partition
Replace snprintf("%s", ...) with the faster and more direct strscpy().

Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-01-28 05:28:13 -07:00
Christoph Hellwig
3373503df0 xfs: use bounce buffering direct I/O when the device requires stable pages
Fix direct I/O on devices that require stable pages by asking iomap
to bounce buffer.  To support this, ioends are used for direct reads
in this case to provide a user context for copying data back from the
bounce buffer.

This fixes qemu when used on devices using T10 protection information
and probably other cases like iSCSI using data digests.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Damien Le Moal <dlemoal@kernel.org>
Reviewed-by: Darrick J. Wong <djwong@kernel.org>
Tested-by: Anuj Gupta <anuj20.g@samsung.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-01-28 05:16:40 -07:00
Christoph Hellwig
c9d114846b iomap: add a flag to bounce buffer direct I/O
Add a new flag that request bounce buffering for direct I/O.  This is
needed to provide the stable pages requirement requested by devices
that need to calculate checksums or parity over the data and allows
file systems to properly work with things like T10 protection
information.  The implementation just calls out to the new bio bounce
buffering helpers to allocate a bounce buffer, which is used for
I/O and to copy to/from it.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Damien Le Moal <dlemoal@kernel.org>
Reviewed-by: Darrick J. Wong <djwong@kernel.org>
Tested-by: Anuj Gupta <anuj20.g@samsung.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-01-28 05:16:40 -07:00