Contains a couple of fixes across the board and adds support for the
recently released NVIDIA Jetson TX2 NX Developer Kit.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmEWmSETHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoQBWEAC0QGn6KBXuqIqOdphFjRD4N9U8cJjO
Xj7TG2JrVH93JC9PVzYfBxBNKURp4J2d6J5ChSjo+YrgDybjDgouV7R6idUKUcTp
EU7Gxv8WZ5zHp+qNU6lh/ZFzf8m25mPS9dg4j3+vv1bsIYPf8RvQztJXqgXujPWD
eY120agyLiIWOCoBWYC0IZ7O2FXtHk+1yOaznzBa96CrjE2sfL1NiuUgh8W9IbLG
QuKbWQxNn5fldljgYnbdLd25F/DnbMqPm9v5LaiCKtMrdhtL0HWZQNiAjtTGcdS3
i29SyPwh0PZ4XHr088Gr4YsZ1jwTeQNmaSmkKvtaP4GUK2p1jOkqYAQOxGhppAbX
Y/zToY2uheRRi5NNblluPN0KFvzE/YF5RKQnRMzsyhd3q0x3v/uVr2K3MIhSLMrh
uNxQoJcl26Zksh8mgIE2xmlm6bzRS/sOxJwKWyOyAnOa10ctXILN5TW/zKV64bj2
t9l+Y9w7xBmoRs4liThl+mCdT9wDcV2j0JCvk3NbA29OxDHL7t8IxbTS0FTbjlnY
A7ShMjQIBCHqdqFvH4e/+o9H4s13xdxxasWCkejeGUAH7aGlisZAeZh3guAYc5sy
x7hKKFq5a5p/gfGSQrckTO3dEh8hFqzhXv8lRJENTHnsKdCNuW0dF7EyOXjEfjLe
bfWjw4eYTE88Sw==
=GoQ0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEa0dMACgkQmmx57+YA
GNkaQBAAu3R0HU2Z7VWTdHBjTAnHWSsDwDsc9CN6EdDnDQTqxCgzsvySaasgxfN0
xqNUrhD15osAl2Wj96r0bJMJfrKftK9ZmqHfEIjDMGUWJ++Z//gKB6iIARuoYYMI
84Xhu/6umQAv7sdObOh66LLlXZDtpQyRKslCpTFRhGg2+42/Z0wBIHEEHG40wgJQ
/JcF3mHIhh2A7WhXH9sKC3uxg1PfU8UkNLmaQPUgdRwIJzBx5S8oRapCcLGwZJDj
AUBBUhIeYrRByc+evjLqaCdcPJ/5rkboJyf929nSudP8Hv+4JP71dmJPVgBoTdix
0KEmItD79pv9Y7qKlOR0P1Ng180WP/N4ihukGgobef4RUAAoGrmo4Or1ceO4VB/8
ReL4q0L12jpb0FGz3AfpEsERojIEIGkg2l2oMNDofxJT47/EfwCJ2Kc7SDCm9cWn
MWZ/shjBUI5YF5AQg/y8hOLsWHBso3aRaF+IT1wvmFxcavAxAOh/vDHETyWEABqT
G7YtW0ZCYW+YH8MkERyUgOue+S1xCF9x4iFaeddYkwl3m2o7g1PehpWNpla/9SM9
gteNT49Cw9I0gmAk/+y82IMY7IYUYEBLquqHxDkq62J23Qp1ThKN/yqVAsMicm/q
k9IcUMipNCsn6MruUE1A0+BAkfmu6YZguXuGo6+MXIc8m07Ou6w=
=VTDC
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.15-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.15-rc1
Contains a couple of fixes across the board and adds support for the
recently released NVIDIA Jetson TX2 NX Developer Kit.
* tag 'tegra-for-5.15-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Fix compatible string for Tegra132 CPUs
arm64: tegra: Add missing interconnects property for USB on Tegra186
arm64: tegra: Add NVIDIA Jetson TX2 NX Developer Kit support
arm64: tegra: Add PWM nodes on Tegra186
arm64: tegra194: p2888: Correct interrupt trigger type of temperature sensor
arm64: tegra: Fix Tegra194 PCIe EP compatible string
Link: https://lore.kernel.org/r/20210813162157.2820913-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The majority of this is temperature sensor additions for various devices
and fixes to the trigger type of the thermal interrupts.
Other than that there are various minor fixes across the board.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmEWmI8THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoUMWD/9wdd5/zlOG3XHYGlo30TzoHLW6nO6E
VmZm5RlJ7JB7XRxFLrB22d0Kt9L6fm8UW5GOGCK4sG47I/+YyNUFDtn+TpQJeUvM
iQ7ImX9X4bFqVn7ul6xWhdCEN+p3ZTRcqTAtgEjJevs9i86EIZzYNtLaIHRqvxwT
9S7/6jtESZNRSVoH0/wQay0lOHoBoHhSzJTGSS61yGak/NAQDRdU0xNkvTarZbVb
VCojDx8uNuAuEUqvPxY9BRdhHy6PAPebSem60Akm+S76HUQ4CIea9A/SExsOfq0/
Zv07nMVKHjxAkKp+Mr8QWCpbJpdrf6snUU1nuGsOvnOwvgHQtatVlsYs81HlByGu
lI3mdajL8XSkxCIHnl2uXOXMuOnlh7BBuE6ie0/S3QN6yOMEI17kAJUnoB2eYitx
wfswrH3sVlJ5xFhb9oqhfz3VfjG69PPBLudm2YGLVs4pYVfvGS88Pqes//6jKfsT
1TgRmJEAwYaFCrhPJXjwnZniHc4tc6SowQ9XsPyhV9LepwbAQKF6VMzVOOqU9UW/
2fGlemi4aKWRmQRAlLT8kA2IS8fip7NOXSl/ffcGGnpqM5o38kikZsYRWgS+7kxT
M24mNefKwTy7FQjnfPPXfRo2xBTqXKNRmdUEHFdMwCTxNnVF8bf3I96IO8zsb408
vH6+nkJ/Ty7HaA==
=8RvP
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEa0YAACgkQmmx57+YA
GNlbRA/8CvbB9v0CzVxIyEZQHEsTP3FZAu5kDUFxjG32yqNxmWTfGV197wQ7xLdI
R80L3LMf2kfWwwVi66dUiYpOVdUSg7Z+vZmieZhX4Z2rjtDdWzHYZYHF45Sc2UUr
yvJa41pCAx1GzI7vyfPVSRnIRpoc1GHumJzEQT8K4K7w9owImboZfgwufwkd7zB/
Y6XdAaFUiZjYsddAaiEE6NFAGAP/QSWQLRYmJB923P7kCKytS4zQp/bcUH+CrrrE
mr4ATkvrW5mclmaDhWjFsIHVUmpFUPiooCqy4eEg65muLm1MS30+6LO2U3F3+Vtt
hvAYIDtaI5WBrgwYVBnWMJuPtP4UZdybdmWJnHXKH+jVU3a7jjOo/59uI2ZKapYj
yOImKxJFMkJh/qPEDIyECtNXrbc+hqy5Pj3PryztEKx0lW8okl8eqDUN3JtUNkQc
AP5oMP36vdOhP2nZkfy8LlPz/1woQOlC2cPbP9mVU74kw2t2eybbinNLnU0pgAm/
bNh7In09ivbC9LUNoP63c1gS+ZF4yzdzomHNqzqIIy2i+RLrccPiIWg7DgMwX5ze
MtRHbuGNmMqoGgSzQx5u5PMPaw8aSRnNuoUiD7EjfydIqI90/0NLQ0lDrqMD/ctV
ftrlkNTVM6Y3OdGTyWFhmVAUjLeljY0yEaqBaIb+2YHS2icAYmI=
=zHxH
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.15-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.15-rc1
The majority of this is temperature sensor additions for various devices
and fixes to the trigger type of the thermal interrupts.
Other than that there are various minor fixes across the board.
* tag 'tegra-for-5.15-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: tamonten: Fix UART pad setting
ARM: tegra: nexus7: Improve thermal zones
ARM: tegra: acer-a500: Improve thermal zones
ARM: tegra: acer-a500: Use verbose variant of atmel,wakeup-method value
ARM: tegra: acer-a500: Add power supplies to accelerometer
ARM: tegra: acer-a500: Remove bogus USB VBUS regulators
ARM: tegra: jetson-tk1: Correct interrupt trigger type of temperature sensor
ARM: tegra: dalmore: Correct interrupt trigger type of temperature sensor
ARM: tegra: cardhu: Correct interrupt trigger type of temperature sensor
ARM: tegra: apalis: Correct interrupt trigger type of temperature sensor
ARM: tegra: nyan: Correct interrupt trigger type of temperature sensor
ARM: tegra: acer-a500: Add interrupt to temperature sensor node
ARM: tegra: nexus7: Add interrupt to temperature sensor node
ARM: tegra: paz00: Add interrupt to temperature sensor node
ARM: tegra: ouya: Add interrupt to temperature sensor node
ARM: tegra: Add SoC thermal sensor to Tegra30 device-trees
Link: https://lore.kernel.org/r/20210813162157.2820913-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The documented compatible string for the CPUs found on Tegra132 is
"nvidia,tegra132-denver", rather than the previously used compatible
string "nvidia,denver".
Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch fixes the tristate and pullup configuration for UART 1 to 3
on the Tamonten SOM.
Signed-off-by: Andreas Obergschwandtner <andreas.obergschwandtner@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use skin temperature for maintaining temperature that is suitable
specifically for Nexus 7. Add CPU thermal zone that protects silicon.
All these changes don't make a significant difference, but it is a
more correct definition of thermal zones.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use skin temperature for maintaining temperature that is suitable
specifically for A500. Add CPU thermal zone that protects silicon.
All these changes don't make a significant difference, but it is a
more correct definition of thermal zones.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The verbose variant of the atmel,wakeup-method value was lost when patch
that added the property was merged because it conflicted with other patch,
re-add it for consistency.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The configuration of USB VBUS regulators was borrowed from downstream
kernel, which is incorrect because the corresponding GPIOs are connected
to PROX_EN (A501 3G model) and LED_EN pins in accordance to the board
schematics. USB works fine with both GPIOs being disabled, so remove the
bogus USB VBUS regulators. The USB VBUS of USB3 is supplied from the fixed
5v system regulator and device-mode USB1 doesn't have VBUS switches.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC.
Add interrupt property to the temperature sensor and enable it in pinmux,
for completeness.
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the on-chip SoC thermal sensor to Tegra30 device-trees. Now CPU
temperature reporting and thermal throttling is available on all Tegra30
devices universally.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
A series of changes to update am3 to use cpsw switch driver and
few updates to earlier SanCloud changes. The plan was to send the
cpsw switch driver changes earlier but looks like I never tagged
the mail thread in my inbox to apply for v5.15.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmEUxPQRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXObZQ//Wtoib8IwHgRi+RtGxz5ThZciiXEkORjK
s91xVX6dTYavWFC03XhlncsQaYd4c0E872aAWjeV7AeJdSfCbvadq9g4IWv3ZCuN
2CYQzpuRt8yKEYR94qPyGVNOJbhYA7DGsm/lXSaC3yRvL/H5Yvt9vEUzRh0I668E
mZaCnSuC0RLUixFVC67HV0qQ6igciTxIX1JAuRRHvW7fET2gGILNzzD3CtTWNYyO
Ne7lz5D4CYdmQlwnW2YDJyIvhoQ/TP/8hIEWZQphDGE6u2uwnZBU2G8sZ/yao+IB
gY3kE3qzh4dX7xfrtG12P1f9kZt7IRmQO37lbkxPP36a5Lg++c2PUql2yy4h5oBO
cYAWXG0ZhCy6SXuVUsIIRz7vZlKvLb9i8fjQIw/JMW/b/CET9IQ4e9hT/fUBLmA4
nNRnwfoNDXIZjCYq/CspjAmOAXVdP73xTaEplPL/HCTd7VJTnh+aV/PniYZkxVE8
ujSRDcuP2TyuI3nVSgoKVmZ3kKBu0cmSa2e8SetgXo+QE1O6JvM1as6DEKm6EkE+
DVXkhkudJRpnHuhPML9BSchLP2yfzpFBuEuRYtHDgonXY1vS1/gyTyq+PEw+UthN
dyFQla8Q4dqHvOmi4q2oq3duTh9d4Laiv/pH8rZ7sNnLIZnO1dBlYPh4zuH5C0D2
K8gM2UG3TdM=
=qPV9
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEVivsACgkQmmx57+YA
GNmy3RAAnpqWhBfjpFXfHSKEnmZ4O83KpSADsZc9SW8NOPF0YOWD50GU07bg7AOO
gGZYQXwBOn25qxr1/aotSHS/9PCXTOXd157uviE+TPNuba8nQBRVDPWmrSJkcm/7
8RxhYqJo6LquO5HNECAYP8eMS3kzePy5rLD8o+rkCkB21W5iTuXIx59+p+wNUpTf
hg6spRjPQ64gCcpwpp/4br9+CIE8cgMQLER/twlpBzhHR8hPCtTN3JAFL+QD2ii2
J59OOI6NAL9FTyNRce8Xg/V2gUCKbMnTlWEWCKJjPYW15uvtrIiEPwXP4rgstxeX
sZKd7l4/Yo0Vs681WMEa6O/3TLnRr2A/9sDJktcCiqc3kdRPWauOpKxaAySHFMAO
WVroAEvZnTthnoEbbSq4z/KTuTfq5rdattj8RIC/XoL4eYzvy+y3n8aREMI7FKia
hBLyGT+5/zuyt/I01Y8F0x2Kitgp1pKsSXmcTz2txqEk6gSNguAQYc/tz9282Srg
q5/0nP2T+av56CLOQRES/Nr/AvtX2hQgPUmq/PTe6ouHm7mpRSzuP4T+dcibT2MC
N67DjQYVq+u+hbOmqYh1uN5TLKkA11pVUC9tavmjzTFiI+SAiHLsmVxOA/XxEUWB
VKqbD3aPjpLdYgC6tCC5Yb5k1aTm5fmhuB/+ZmqIA7vQyzpLZWw=
=7Hv9
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.15/dt-am3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Changes for am3 cpsw and SanCloud for v5.15
A series of changes to update am3 to use cpsw switch driver and
few updates to earlier SanCloud changes. The plan was to send the
cpsw switch driver changes earlier but looks like I never tagged
the mail thread in my inbox to apply for v5.15.
* tag 'omap-for-v5.15/dt-am3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-sancloud-bbe: Drop usb wifi comment
ARM: dts: am335x-sancloud-bbe: Fix missing pinctrl refs
ARM: dts: am335x-bone: switch to new cpsw switch drv
ARM: dts: am33xx: update ethernet aliases
ARM: dts: am335x-sl50: switch to new cpsw switch drv
ARM: dts: am335x-shc: switch to new cpsw switch drv
ARM: dts: am335x-phycore: switch to new cpsw switch drv
ARM: dts: am335x-pepper: switch to new cpsw switch drv
ARM: dts: am335x-pdu001: switch to new cpsw switch drv
ARM: dts: am335x-osd3358-sm-red: switch to new cpsw switch drv
ARM: dts: am335x-myirtech: switch to new cpsw switch drv
ARM: dts: am335x-moxa-uc: switch to new cpsw switch drv
ARM: dts: am335x-lxm: switch to new cpsw switch drv
ARM: dts: am335x-igep0033: switch to new cpsw switch drv
ARM: dts: am335x-cm-t335: switch to new cpsw switch drv
ARM: dts: am335x-chiliboard: switch to new cpsw switch drv
ARM: dts: am335x-nano: switch to new cpsw switch drv
ARM: dts: am335x-baltos: switch to new cpsw switch drv
Link: https://lore.kernel.org/r/pull-1628751694-126144@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1. Add CPU topology and cache information to Exynos DTSI files.
2. Correct GIC CPU interfaces address range on Exynos7.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmETjokQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1+34D/472JBsDKMDojVpgoac5FP4Wveg1aVXOz7A
zAnpvxXA8BNG8u2z4hEd1VL+9TigoWQcRPosdC03eH81XS6KDLTsVIpOvkc/rmvK
UwtHfyfihR5ImiQm5jXYxjdTSoy5otSs4UZcmPfcrRqs5UMCNuXMW37KBdsRlm7I
8Bv7SYqm27YgaY7aVa18Hrnm5qm/FI3P5UKKerJ+E7MUoLGAsuaBDYY13hDFwF3m
ir8Lcs7Iny3Q1SYVvIiOr3A5vY3YersHLR22YnNamClCrkWdYrvjVj87Lw3fpFrC
KyFej1udvWNFmqd/izXocfrNROckVWYW2IZAbGqxBYQTAXIeijZEoQq/L7DtUYHq
zta9WSgBrUdCd2Ry9n4m6PFqoJ4hgn4Uko/M1YP+s/JkiPREmEGuCbvWzxZzz4jA
kbCIqb+OGvtugaiZGPcOxTmtMCbOsBrQYIwnNycF6DLPrm3U2y2Yw9fWy03FpdjC
sdHTQwku2uhyOu+i6s1HDv6SVMgXXAjcAcliCNxjXxMqnp/OdPaDY7WcfcQeHjpr
shxp5du96KeTp0NFO5QJK3k/qfc4y9lLUbDpXfRv2v78RPD1UxNyrB6ZoKYXLc0z
V/wcRFnkLns7a6ZF6eztg6PBi8H3nLJ3ZwlpsPCwnrPN/WAGYym/pm6y6BdZvNpj
8izPQyOljg==
=RYWx
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEVitcACgkQmmx57+YA
GNkjVg//ayGSIfLpQyhGVaFDTlGvM4NhZ6KwPdbZqDSFtyA2nZ9krC7mhzMfIOkg
led+FSg41pmoiUzK6RaXLVxlPpOmyNdFc6ABo2dUKuY01VscZDOOwPCRLc2eAB3K
QdM1Chwky2uXkxNt3oKTxq/UuRI6X0N1reykml7WU0nrQCAWJC12AnTotpf2FM9d
D7TtBDFIefIgGox2TUNIMrpVcgjzocr6ayl26otgGoDtHhy3PmcPOsMof0bHbMdn
uZylgCdoqO/R1K2lFcBKqJxgvu0GF+klpSADquE3mYkAFQGF8Cj9T5VIRARGJiZ5
J+B/u6nPL/s2Acna2n8PFtAZJUxLaPCL0tQu9MhO8cbZ10vrMS4tR5obqFk/WVhS
gaVLHw4vcZB7f/HDIjoNxErV6am0mwOnQ73cZilGwg6LkdeMcKFijXQiYMKBuEhb
LgCRZ78ef3aorpI1D7kpHip/lj0A2+yOEYrtZ6+4LrB3hK/vEd5d+kaVlY+Uq7aW
hwRK1p6QUfFkKa2MI6WwhMB0V/NyEIlK6d5wKvs6obCXX5BK5O3M64fuj+8e2OTC
XQpyTkfOkOJ9I/q7yrrnnOf6Z+qs+hvcc0VhxmugY2p0NHu1Nn16YmG3okt1EUKC
LSx4eQ2cgHgkaN8CMnQI0O7DIixl25czQS2AYOZFWJ5ThLmMDvI=
=JINZ
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.15
1. Add CPU topology and cache information to Exynos DTSI files.
2. Correct GIC CPU interfaces address range on Exynos7.
* tag 'samsung-dt64-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: correct GIC CPU interfaces address range on Exynos7
arm64: dts: exynos: add CPU topology to Exynos5433
arm64: dts: exynos: Add cpu cache information to Exynos5433
arm64: dts: exynos: Add cpu cache information to Exynos7
Link: https://lore.kernel.org/r/20210811085128.30103-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add regulator for MFG_ASYNC power domain
- Use alias for MMC to get fixed numbers
MT8183:
- Use alia for MMC to get fixed numbers
- Add optional event number for Global Comman Engine
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmERFfoXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH5A4RAAj1V2Gy9bzrr8ioIh0cMXlWfK
iAaPdlANDrEtUVD8RjMxxnHtcDg5Opo3GeFCQXbJdPtJteLPNsftE8kWsQ5XDeA4
CUqd8wvXh/3z8knbhTnt0CETcLukmO4lM8zmBi0MAszYkN/gDYvpQAeguJluv6un
h8Y4oyK8G8gJGyz7piqrmi5H8w3YY9lNwoIKDIHxbWIIkrf157lmgjuycJ9JUdiE
ae7opTcnvB128PyDvFjMOd0S6Qo7kMcPE2CewTwxK2vREpbX2Y2qwPXR1voG3U2/
fVbwfU63s7FL17Jqt8McLr7nQ6jFL4pbmcbu3TDwcWBTyzdzaVR5K8XzIGmTI//P
cS2rRBUvb2NG+nsc5AucrUhKFYgoH2cp2t7lK6Lng8I46LX1L+fC0a4LkgdCg5/R
v3PNuRhyUaQg9ftC4+9x6EL+fRZ8tErBUXTTgzkNu6D0tERn2bT8f/pv0g4ejiSq
Sl19YriWFqHU49nrs7K+epKXgXH9bW0yeoMs0Nkp7THaevuIDo2TtZDtoOLGI8/g
GkeKWdq95ocvIXoXLWgLIITeWePljuvmkULcEHw/wov0mw6nvk7tjXtTfLAB6531
z+V15SfIZIRM8WmWA/15TudZqjkQ4EO/CMg6zZ5IKbKHfKaiIXy+xA/COXCc/Aun
PcO8nkpNk2+64L5e7Ns=
=RXt8
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEVifsACgkQmmx57+YA
GNlRVw//RAwVsvH0WMlM+5fQB8vEdJwxb9xwyhG5QWUJSKWum272HOJ5ugDZ0KtI
MfHyhwtILyJr8ePT58fHW+yWRR21/H9qjZIgQoRCld2bLV2Ni64Ypo6+urihKgxR
hPaTVdEz0gYY+xwnaNxdm9vV5r7HX9e/eJ1WJaAdSjuPj5mA/ewLRA014pNG57ye
kDFQ5NwbmcN4iohZg/G/MDJym/g0wODcfZg7wfyJ8yhl8uPOFggD4IkKKeiSQaFg
+R87ARRKX9DXRwgN6SblD/l1bVsdukXfyFNLalFEm5KLSeFD4Hub1d9DNkvdQtoX
v5ODXco3uPTZz+F2OrZja8w6lgSw/v6ksQ4BYqZpeaioTrZPqheb10Bm530FPIGy
cd9sBnvRuPxwr4uCPa+E3jPfneC8ea5tlNKUIPWErD53gXdbTInztRt74XwQD6nA
J78YAuF6SMJ1ZnbCcG3mgqnZgxBhbu3O2cEPN5wqzlr0fIwWJmcHJJo4etT6jeuX
oGLyF6xl6NJIvJcMDUooUBAzGRbox+Cuey4n/7GYMZ/vgaBZFBPgJDEK04RWp+kV
H+nAL5Ezcce/2/stMvmKcd2x9Mheo1jSnDG/KZz8XwVqUw1KqDcnq1wMvzSX9vDk
yg59OHTk9hUOebfmSNzwqy6vMBexIRL8sUkY/AIlu9JnbfIBswo=
=xVao
-----END PGP SIGNATURE-----
Merge tag 'v5.14-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt
MT8173:
- Add regulator for MFG_ASYNC power domain
- Use alias for MMC to get fixed numbers
MT8183:
- Use alia for MMC to get fixed numbers
- Add optional event number for Global Comman Engine
* tag 'v5.14-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
dt-bindings: mediatek: Add optional mediatek,gce-events property
arm64: dts: mt8183: add mediatek,gce-events in mutex
arm64: dts: mediatek: mt8173: Add domain supply for mfg_async
arm64: dts: mt8173: elm: Use aliases to mmc nodes
arm64: dts: mt8183: kukui: Use aliases to mmc nodes
Link: https://lore.kernel.org/r/26c4026a-9f26-d5a3-c30f-439120a4eaa0@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix up some (non-urgent) IRQ flags for the PCI buses.
- Add the second UART to the generic ixp4xx.dtsi
- Make use of the new expansion bus driver in all device
trees with e.g. flash memory on the expansion bus.
- Adds the CF card slot to the Gateworks GW2358.
- Add new device trees for:
- Iomega NAS 100D
- D-Link DSM-G600
- Netgear WG302v2
- Arcom Vulcan
- Gateworks Avila GW2348
- Intel IXPD425 and siblings
- Coyote and IXDPG425
- Linksys WRV54G
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmEQcFAACgkQQRCzN7AZ
XXPNMxAAy16o6ou1gt6KCMGckTD3kyASAFZ3tk+dxgdZbBAU/fR6YR/ck1svUmuC
R4JUJpq5ToR7uWVCca1dHv5pN7e0hd06sM/+nyk5xJG2w1Ow2CuvAGBXpwz0sBf7
hvw2z23CUSTIesK3df9HZtuoagwhL3nsmfES3km0R+u2dQeS7rZDtHX6x++7c41q
9MPMqokhaEM0MV+7e2P7dQ6tTmLBLB9AijxEBdS2x3hsSyD0wom6J8ZlxZyDyQrG
OlhDm/FSPjJKtvwx78c8fSBLkQeql02CuG21L/L1Nicm5jG1sWjZ9fJUu8yrh9zb
RqfjFAhAOGdLDBVk/SEoMa9+6BdMLgy+MbenhX5FWdlLW9OVEAdzABtlEK2XiSRs
LDyWvEAi1Jii5kHT4HldHw+Luk3dD1hQiuPWWDK7xGnxahwTtwoJACHrYIsFjH1t
hz5ZB/Q74qGmDLgcBgGZrpQ9/RXEhh1scxk7OGO7/yzZlfHby+wWp0aGHe28pB7N
KPyXbP85EbucVhZ5V1Vu1FHQbZ9qp+u381Lj7OtQFIyPRAuGGy+55/3sQqfoq7lE
0+JVZIhTZUrZIpjtymfk7g2nkSbZU5Se4vswlx2awVuPf6Uz766M07swaR+YP9YU
Byp5QTAmebrvoIHHo2t7sT8bi5k94/2Lko8d5aKENSdQohs7yaM=
=ig2J
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEViYoACgkQmmx57+YA
GNnvDw/+KU4vgACfZqdeM1F4GTdyjN0kZ/sKNkRyGIQpveQn/+rA7Yv0xLhofPiM
NRC8pekw8HcEGKQ7TpP0u7wveBOWZbpKFb0fbQytHIQlHQsVQI8aqSkhoFzZbSoT
vJJdq0kN+U0/TxIHT3qnQ/FeSNUjtKLcWYbKpIgVXbpqgCrcxeODfCJOwD5f914x
XY+MMpc6byoFygLfn78tNfJg6QfmXIsnQ70sOqdgua8hSRJUnzWLL8ej3eayRMyX
JlfpPiyxbSaHtZvI0JT0X+mZgy4OhpEeELxEK3DLEsYxbkR/2QAf+SSOY4TOlPux
ikyIzSRG1naeV0xfGJ3flIcjq04KxIneyO1V2CYSxOCocw88fPAAOrWOdq1dzgLg
qFwoWWaBNp8LthPLvkFl4Gy7ScjpceDKE/yk2xRv8p2E64s3JLs2wicFZHAmZlWM
R9ECiFfQkMQg9Y1inmIyeFS9GTxF4HA2J/jnK52b6yAAljG/FnKs31X9WfOrYsqm
6eIcEdelTSrOoiqa0jPCte2uOzvsdMdtUTGJNjUoTuOZTb4scVihNe6WjsPg8Ftw
S3Mv0NlebijZzFDa/fk/u53/6kayh83XftyhB0OlirDKjKnRsgD+1op5jr0FTlHo
rX2j4ihbRfvTWk3lfV6B13xxqFAMewfCF1Zo7fmlFf2uLWoUDqY=
=8Yz2
-----END PGP SIGNATURE-----
Merge tag 'ixp4xx-dts-arm-soc-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
IXP4xx DTS file updates for the v5.15 kernel cycle:
- Fix up some (non-urgent) IRQ flags for the PCI buses.
- Add the second UART to the generic ixp4xx.dtsi
- Make use of the new expansion bus driver in all device
trees with e.g. flash memory on the expansion bus.
- Adds the CF card slot to the Gateworks GW2358.
- Add new device trees for:
- Iomega NAS 100D
- D-Link DSM-G600
- Netgear WG302v2
- Arcom Vulcan
- Gateworks Avila GW2348
- Intel IXPD425 and siblings
- Coyote and IXDPG425
- Linksys WRV54G
* tag 'ixp4xx-dts-arm-soc-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ixp4xx: Add a devicetree for Freecom FSG-3
ARM: dts: ixp4xx: Add devicetree for Linksys WRV54G
ARM: dts: ixp4xx: Add device trees for Coyote and IXDPG425
ARM: dts: ixp4xx: Add Intel IXDP425 etc reference designs
ARM: dts: ixp4xx: Add CF to GW2358
ARM: dts: ixp4xx: Add Gateworks Avila GW2348 device tree
ARM: dts: ixp4xx: Add Arcom Vulcan device tree
ARM: dts: ixp4xx: Add devicetree for Netgear WG302v2
ARM: dts: ixp4xx: Use the expansion bus
ARM: dts: ixp4xx: Add second UART
ARM: dts: ixp4xx: Add devicetree for D-Link DSM-G600 rev A
ARM: dts: ixp4xx: Move EPBX100 flash to external bus node
ARM: dts: ixp4xx: Add devicetree for Iomega NAS 100D
ARM: dts: ixp4xx: Fix up bad interrupt flags
Link: https://lore.kernel.org/r/CACRpkdY19AvWT--OcmEKbwFue_EcThVs7uZeHkzORten7xj-RA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Devicetree changes for omaps to configure more devices, and
add support for new SoC variants and devices:
- Add add gpio-line-names for am335x-boneblue
- Add support for dra762 abz package
- Two patches for McASP support on omap4
- Three patches to add support for am335x-sancloud-bbe-lite
- A series of changes to configure PRUSS for am3/4/5
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmELpF8RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNSmg/+OSmuwyu5yQn0nibALyLH07uZPwpXVlIH
VRL423lwLYpamfZMjegNygwHDIx1gk/RAqWI/UEjhPzKsqLvaJpg+BTW2rNBdEOO
ZVGX0S7EmzxLQPQTbUAzpHwP5BK1/WNwi5AN+eMVTuFgSSQ24Rq2chrlhPKD/4w5
bDtZ967IMFYEPs0mAiInYPme2M2oFb16EYLA4BK6qKnWE644D3juqXGmhRZS8FFv
rKg8rH0bmnRSRDO5vl+/BO+27Df8g+bzftRuUp9zF5QYzp3jkLi9NHNLz5XvLBwQ
eT7wRCsXOaeEdVMidvqVRsHkflxZmfz2pP8M9PgOKjym/EdUD8NMv6R5Ina4sKEK
761lZVr1BAq2kKtnBgRVMOyKkvp+1HLVWf5H+Ri/0Rjpit2RByLJYfDIImOtOpuY
46L0hYSVx9nGPG1xKbIlT9238opfgs6OELTcn7diisJkDYrjToQairEKDA9ypQyq
xpW74iMd/PedHlX30mYV0ie3wTqoMdZ3UzAcQrxgd03GXPO5QBjet6diyoXHDkFG
608mIflZHzzF14IY93JGF/rex2NhxnmcyKA3TjKKWq9daK3T0uNY2aS6fA72Ay4Q
EdU49ymbN43m4WxV6hgXZWnzfqmvk0822ANs+uUaJfDlM3g0ajmFf0cqSMkxFLO7
upb8FcNMhEc=
=tnQt
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEViMYACgkQmmx57+YA
GNm6ng/+IWb2/djgTs3GXgnHaNVZ4DI2GIDqSjxjkWrWnQ42qc8zwhz18TmoDU6Y
K6fvftSJ/QjnBibI+riSRaQQHkiGKR0Ipl15/a+cwjSO7rVtSI+mDsOPorQaKQ49
/EILoRzSWeb0G2MV8L+Zo6OHKs7l/6WhRqvNrbEeN6zWb7JTG3R05PuyZLC81eQj
tqHKvAfWL4dgDfqekeEaaj3duH4E36miR+z47s5Gf96qlKryUS8HGSQgIiuWm172
ZJj3nrkI8VUE4mR4toO37T0ytLA0Ac/RxmMaNYe/8tgV6pREZD6gBAjHqPEZMxL0
Z8ayKAPrfMAmn1HyBi8QTGbXsl5Cktt05RbPkvug1q8RAPfyyiXK4i1iY1BuriYi
+zSrlaaVMboowh3RgAsatNJo3H5USIR0JTbeCRCsIrHW7hxlRQ4wF/IDMVOlUHQa
TFFsBNCxi5uBzmWuTV4vFCUoQGZYxyp494gzH3CsLsn2SOe7QxS+eezDmwXRCRoC
cMiz5RGeuW3pfwrh6lyDSmOsX/BpZI3CYBNExRd+XbwGloqURoKJsJdDOwn+202s
lDEWv/reDvEAMzFQJz9DimnHJPFobkZsY+FVCYCQH7PblitRB2332n9Ses7bzoQn
yiU20IzmjccoAF3w4gHiStlIhejk+ovjjnXX0+qsTiZ3WOxe1Hc=
=7+WI
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for v5.15
Devicetree changes for omaps to configure more devices, and
add support for new SoC variants and devices:
- Add add gpio-line-names for am335x-boneblue
- Add support for dra762 abz package
- Two patches for McASP support on omap4
- Three patches to add support for am335x-sancloud-bbe-lite
- A series of changes to configure PRUSS for am3/4/5
* tag 'omap-for-v5.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am57xx: Add PRUSS MDIO controller nodes
ARM: dts: am57xx: Add PRU-ICSS nodes
ARM: dts: am4372: Add PRUSS MDIO controller node
ARM: dts: am4372: Add the PRU-ICSS0 DT node
ARM: dts: am4372: Add the PRU-ICSS1 DT node
ARM: dts: am335x-icev2: Enable PRU-ICSS module
ARM: dts: am335x-evmsk: Enable PRU-ICSS module
ARM: dts: am335x-evm: Enable PRU-ICSS module
ARM: dts: am335x-bone-common: Enable PRU-ICSS node
ARM: dts: am33xx-l4: Add PRUSS MDIO controller node
ARM: dts: am33xx-l4: Add PRUSS node
ARM: dts: am335x-sancloud-bbe-lite: New devicetree
ARM: dts: am335x-sancloud-bbe: Extract common code
ARM: dts: am335x-boneblack: Extract HDMI config
ARM: dts: omap4-l4-abe: Add McASP configuration
ARM: dts: omap4-l4-abe: Correct sidle modes for McASP
ARM: dts: Add support for dra762 abz package
ARM: dts: am335x-boneblue: add gpio-line-names
Link: https://lore.kernel.org/r/pull-1628153040-834155@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The device tree node for the XUDC (USB device mode controller) is
missing the interconnects property that describes the path to memory for
the controller. Add the property so that the things like the DMA mask
can be set by the operating system.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Jetson TX2 NX Developer Kit is very similar to the Jetson Nano, but
uses the more powerful Tegra186 SoC.
Signed-off-by: Thierry Reding <treding@nvidia.com>
These PWMs can be used for fan or LED backlight control. Add the device
tree nodes for all existing controllers found on Tegra186 SoCs. None of
these are enabled by default, which is left for the board DTS files to
do when necessary.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Jetson TX2 NX Developer Kit is the same form factor as Jetson Nano,
but uses the more powerful Tegra186 SoC for added performance.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Renesas RZ/A and RZ/G2L I2C Bus Interface has no less than 8
interrupts. Hence document the "interrupt-names" property, to make it
easier to review the interrupt mappings in DTS files.
Note that this property cannot be made required yet, as the RIIC nodes
in all DTS files lack the property.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/a81d0e14e395f297666e8c3a8ce3e292d2606a65.1626267422.git.geert+renesas@glider.be
The LM90 temperature sensor should use edge-triggered interrupt because
LM90 hardware doesn't deassert interrupt line until temperature is back
to normal state, which results in interrupt storm. Correct the interrupt
trigger type.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Missing definition for the P0_DIV2 core clock on the Renesas RZ/G2L
(R9A07G044) SoC, shared by driver and DT source files.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYP6nCwAKCRCKwlD9ZEnx
cBBYAQChmXlc7NoSf/fVy85x+9fA2VhbO0JxkwuK1qJD1JkusAEAq2GrHxxIba1H
NtMckRLKIAE3vJa25OQdK+T9Hasw9wY=
=mbnD
-----END PGP SIGNATURE-----
Merge tag 'renesas-r9a07g044-dt-binding-defs-tag2' into HEAD
Renesas RZ/G2L DT Binding Definitions Update
Missing definition for the P0_DIV2 core clock on the Renesas RZ/G2L
(R9A07G044) SoC, shared by driver and DT source files.
Add initial support limited to HDMI i2s and SPDIF (LPCM).
Tested-by: Oleg Ivanov <150balbes@yandex.ru>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210804140258.4666-1-christianshewitt@gmail.com
Add initial support limited to HDMI i2s and SPDIF (LPCM).
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210804140029.4445-1-christianshewitt@gmail.com
The wifi chip on USB port 4 may not be present on all BBE variants.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>